Sir I am a final year student from electronics and telecommunication branch and i am this code for my final year be project . So please grant me the access to the code.
As your Hex file can't be edited I was working on applying same codes but couldn't configureation bits your's has a sys. clock postscale is 96 MHz PLL /2 where as in my case i dont have option to choose it (i have no prescale , etc). rest settings i managed to keep them same as your Hex.@@mixatom966
SIR, CAN WE HAVE FULL-BRIDGE RECTIFER AFTER PT AND USE VOLTAGE REGULATOR TO CONNECT REST OF THE CIRCUIT? WILL YOU CODES CHANGE THEN? THANKS IN ADVANCE.
