You should consider keeping the hardware limit of 51% (5.1V) in the output to prevent an override that would trigger 10VDC on the output. My preferred solution would be one activity with a mode connected to Clg1 (if off = 0%) (if on = span from 30% to 100%). Only one span. Then you intercept the modulating output. 30% , because once treated by the output 0-5V will give 1.5 to 5V.
