3. SR Latch using NAND Gates | Tech Gurukul by Dinesh Arya 

Delhi should proud on such type of teacher. Welldone sir great

Thanks sir, I am student from govt. polytechnic jhajjar and i wanna say that you are doing great job. You explain concepts in very simple way so there is no space for the doubts❤

bhot khoob sir bhot acha guide kia ha nice

Thankfulness and respect to you, sir, from Dhaka, Bangladesh.... This is the best class of Latch!! Take my pranam, sir.... 😍😍❤️❤️🙏🙏🙏

sir i cant tell you how helpfull and good your lectures are thank you for your efforts❤

Thank you sir...it was so easy to understand.😇

great lecture sir , thank you so much

far better than tutorial point totally understandable your lecture sir..

Crystal clear teaching 0 to hero teaching sir

Very Very Thank you Sir for this video 👍🏻👍🏻👍🏻

Thank you sir. These videos are truly helpful. Thank you sooo much.

THANKYOU SIR I UNDERSTOOD THE CONCEPT CLEAR SIR

it was so easy to understand.😇

Sir your teaching method is very good I am happy because my concept easily clear only one time see

Queries hona toh impossible h😎

Good sir best way meny sary videos dekhen mgr mjy smjh m nhn aa rha tha or apki video m sara smjh m aagya

Thank you so much sir ❤️❤️

Thank U so much sir ❤️ aap k samzane ka triqa bhut acha lga 👍👍👍

Sir you explain very well ❤️🔥 OP 🔥

Gjb theching quality sir

Thank u so much sir.. It's crystal clear 🙏

Sir hamari collage me aap aajao padhane hamari mam bahut shortcut krke padhati hain wo sirf projector se samajati hain Sir aap bahut aache se topic smajha rahe ho😊

Thank you, so much sir 🥰

Sandar sir G

Thank you so much sir🙏🏻💐 For best teaching

Sir keep going..Gr8 work!!!!

Thank you so much sir

thank you so much and there is no need for the intro and end music

thank you sir, when set is high the output becomes one.. but why in nand latch output is considered as low when set is high??

thank u sir 😍

Thank you sir

You are great Sir.

Sir your words are very clear and concise.

its really helpful

Thanks sir

When S = 0 and R = 0, the outputs can be either q = 0 and q' = 1 or q = 1 and q = 0, for all the three cases mentioned above. Is there a way you could explain the S = 0 and R = 0 case again? Thank you!

Kya kuch samaj ni aya sir😂pr your way of teaching was❣️❣️

Sab perfect he❤️

Why do we interchange the SET and RESET inputs in NOR and NAND based S-R Latch???????

Thank you Sir!!

Awesome sir awesome !!! 👍👍👍👍

Thanks sir hand writing nice

thank u too much sir 🙂🙂

Ty

Thanks btw so much h

Sir but the truth table of Dr latch is totally different from sr flipflop in conditions of ,if s=1 then q=1 right bt here it's not ..?

❤️❤️❤️❤️❤️

kindly timmig diagram bhi banain

Sir, in implement of SR filp flop using NOR gate we take input as R and S But in NAND gate we take always S and R Or we take it R and S also

Sir ek questions h ki hm latch ko nor aaur nand gate se kyoi bnate h ?

Msttt

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Gerendel (latch) yg dibangun dg pintu NAND gate atw pintu NOR gate, inputnya langsung di oper ke output. Flip-flop RS seperti ini, operasinya tdk singkron dg denyut-2 lonceng atw denyut-2 penentu waktu (timing pulses), dalam operasi flip-flop RS seperti ini tdk diperlukan sinkronisasi dg operasi sirkit-2 lainnya...., krn itu diterapkan sbg ingatan..., itu saja dulu.....

Sir ap case mai S or R ky values kaha sa la rahay h

Sir u have said that when s=0,Q=0,when coming to the circuit operation for s=0,the outputQ=1can u explain it once again

i have a question k jb humne case 3 me output bhi mita dia and new se kia sb to case 4 me output nahi erase kia?? means how do i know k kon se case me output ko feedback krna hai or konse me erase krna hai?? plz ans

4:39 why the output of Q' is feeded to the upper gate, As the upper state haven't completed first iteration.

What is the set and reset there?? If s== 1 Q should be 1 na? Set Similarly reset ???

in previous video S corresponds to Q' but in this video S corresponds to Q???why?

Sir,why we used not gate after s,r inputs and then we make r, s latch using nand gate❓❓❓❓

final truth table mein set and reset kya hoga sir ?

sir u have done wrong for sr latch using nand gate. the truth table is wrong where u have s=0,r=1 q should be 0 and q'=1. please confirm this

Nor 1000 11 Nand 1110 00

Why undesirable s0 and r0 for nand and vise versa for nor

Sir can contact with you

Sir input interchange nahi Kiya toh ...is that.okay..?...(RS likha toh instead of SR input)

Sir why we change the position of set and reset in nand ?

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Sir you told when set is 1 in q=1,but we are getting q=0

Sir aapne kaha set me Q= 1 aayega but truth table me Q ki value 0 kyu hai jab S=1 hai...please answer!

0' has been like capital 'D'😁😁

It's s bar and r bar.. But it's not here

if s=0 &r=0 and after it we put s=1&r=1 what is the q and q"

sir aap ki sr latch ki truth table wrong hai mere khyal se kyu ki 2nd case me reset condition hota hai jo ki 0 1 hota hai aap ne 1 0 kiya hua hai jo ki set condition hai or ye galt is trha se bhi hai kyu ki hum humesha S input ke samne Q bar rkhteh hai output par or R input ke samne Q agr aap aisa ni rkh ke jaisa video me hai waisa rkhna chahite hai to aap ko dono input ka compliment rkhna hoga ye sare rules nand gate ke sath lagu hote hai

Sir meine panchayat sachiv exam clear Kiya hai Lekin form apply karte smay 12 compartmental pass ki jagah 2nd division likha hai.. documents verification mein mujhe kya problem hoga??? please reply

Thanks sir

Thank you sir