5-Stage Pipeline Processor Execution Example (v1.1)

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Discusses how a set of instructions would execute through a classic MIPS-like 5-stage pipelined processor. Also looks at calculating the average CPI for the instruction sequence.
NOTE: This example assumes there is NO branch delay slot.

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Опубликовано:

9 окт 2017

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Комментарии : 11

@wokewook8237 6 лет назад

Cant believe this only came out 4 days ago... helped me so much on a homework assignment thank you

@fran14cruz 5 лет назад

This! is what I've been looking for like crazy for ages!!!!!!! thank God I found it. And no, I'm not overdoing it. Thank you very much!

@aspiringpianist4358 4 месяца назад

Isn't it 13 instructions in the loop? (including 5 to 17)....or did he include the 18th cycle?

@matthewwatkins88 4 месяца назад

It does say it takes 13 (17) cycles to complete the loop (so I'm unsure about the issue)

@aspiringpianist4358 4 месяца назад

@@matthewwatkins88 yup just realized...Great work!!

@jejunegamingtv1359 6 лет назад

With Data Forwarding?

@matthewwatkins88 6 лет назад

Listed to the video more closely. The word forwarding is mentioned 3 times between 3:00-4:00.

@Vwcz 6 лет назад

boom roasted

@LordFers 5 лет назад

But are not 11 instructions? Why you not considered the 11-instruction?

@matthewwatkins88 3 года назад

I do consider all of the instructions, but not every case goes through all 11 cases.

@matthewwatkins88 3 года назад

I should say all 11 instructions