Join us on Discord: discord.gg/jmf6M3z7XS Follow me on Twitter: twitter.com/WeirdBoyJim Support the channel on Patreon: www.patreon.com/JamesSharman After uploading I always do a final watch though to make sure everything is ok, on this instance I spotted an obvious (in hindsight) code optimization I could have made at roughly 12 minutes in. See if you can spot it!
I knew the successive approx algorithm but I think this is the first time I actually see it stepstepstep to the answer in real life. Watching the yellow trace converge was really cool--thanks!
@James - I hope you appreciate the joy you bring to a lot of folk who follow this channel. Look after yourself, we enjoy this series because you’re clearly enjoying making it. If your joy in it ever falters, don’t burn yourself out trying to force it 🙂
I come from the old school. One day, I got ahold of a bad A2D module (might have been Burr-Brown or Philbrick?) that failed due to some mistake by one of the engineers. It was very expensive and so I decided to goof with it. Anyway, I started to disassemble it. At first it looked totally potted but I soon found it was just the outer perimeter. When I got it apart, I was stunned to find that it was nothing more than a 555 with precision metal-film resistors and ultra stable capacitors with attendant transistors and diodes. After that I got another idea and constructed a 0-10,000-count counter and a precision integrator along with a precision comparator that would start/stop the counter. I was able to get incredible accuracy and with the only downside being it was single-slope. Fun days for a young buck just starting out! Excellent video, channel and subscribers; good stuff! 73...
This reinforces the feeling that this is not a toy, but a fully functional computer. Really impressive! And that visualisation of the binary search on the oscilloscope is VERY satisfying :D. Thanks for the great videos.
back when I was in school I made a staged SAR ADC. It used pairs of op amps and a Sample and hold for each bit. The first op amp was the comparitor and the second op amp would amplify the signal by 2 and then offset it by the bit. Then the Sample and hold would stage the signal. The result was slow op amps being able to do audio. The output bits also had to be shifted and delayed so that the results lined up.
Watching the SAR ADC work is bloody awesome! I knew how it worked, I could have written the code, or designed you Verilog to do it. I could have explained it on a whiteboard... ... But playing with it on a scope, that's excellent! I want one! 🙂
Having now watched all the videos working on this computer its super satisfying watching everything go from a breadboard to being on PCBs, i love the look of the PCBs
very cool. i have fond memories of an 8-bit successive-approximation ADC I built from discrete logic on breadboard for my AS-level project many moons ago...
I wonder how possible it would be to implement the binary search using hardware, and free up the CPU to do other things. This is impressive, as a software engineer turned hobbyist electronics, I'm loving this series and learning a hell of a lot!
I wouldn't bother too much doing a binary search in hardware. Just using an 8-bit counter as the input to the R2R ladder and latching its value on the transition of the comparator will give you a steady sample rate and your CPU only has to read the latched value and is not busy otherwise.
You could definitely do it, I planned a circuit out to do it a while back. Basically a set of latches, a counter and a 3:8 line decoder implementing this algorithm. Would have a taken multiple bread boards though. If you don't need the speed a counter based approach would be a simpler circuit.
Also.. the minimum usable bit... depth... for digital, even way back when they first used a DAC to convert it to a video pattern, because in the early 70s they had no other useful way to store it, was 14bit. They later improved that to 16bit, and even the eventual CD standard was this same 16bit, 44.1kb/s. You are using a) an 8bit chip, at b)probably nothing close to the needed sample rate. Having seen someone do this with an old Apple II, I would be hugely surprised if it sounded better, regardless of the speaker, or the mic.
@@patrickelliott2169with dither you can trade these off alright. With enough sampling frequency, dither will give you any dynamic range you want. Even at the extreme of 1-bit precision, it takes just 2^n samples for n bits of dynamic range.
@@patrickelliott2169Amiga had 8bit and pcEngine had 5. Also I think there is a video about polyphony in this playlist. 8 bit add is single cycle. So you can mix a lot of square waves with different volumes and still only need a resistor network, but no OpAmp ( other than to terminate the resistor network with a fixed impedance.
Glad you liked! I really need to get a decent audio out, that speaker seemed like a great idea at the time as I can put it on camera but the audio quality is terrible.
Hello there Sir Thank you soo MUCH for MAKING THESE videos.... Honestly as an embedded systems beginner your videos are helping me a ton and again... I really do appreciate your work and please I hope you will continue makin videos
@@weirdboyjim Oh James I’m so sorry, I really didn’t mean it critically. It was supposed to be a friendly leg pull. I can’t pronounce my Rs properly and that’s a speech impediment I’m self conscious about. It never occurred to me that your pronunciation might be a bug rather than a feature. I _assumed_ that it was one of these speech patterns we fall into with our friends as kids, and continue through choice, not something that was a problem for you. That assumption made an ass of me, not you. I honestly meant no offence and sincerely apologise for any hurt or embarrassment I inadvertently caused you.
One potential approach to the voltage offset issue, would be to use a separate analog power domain where one can just redefine the high and low voltage references to suit the input (e.g. low = -2.5V, high = 2.5V), and buffer the GPIO outputs to those levels with push-pull optocouplers (e.g. TLP2270, or HCPL-2232 if you don't want to use an adapter board). One would also get complete electrical isolation with that approach, rejecting all of the digital-domain noise by default. And one could even generate those high/low references _from the same reference as the sensor_ (mic phantom power, potentiometer divider voltages, etc.), so any induced ripple on the sensor voltage caused by the supply would be cancelled out. I'd expect it would be possible to get a noise figure better than 16 bits even on a breadboard, this way.
This "cancel out induced ripple" is the reason that microcontrollers with ADCs always expose an "analog reference voltage" pin, btw. All ADCs just read in a value as a fraction of the reference voltage, `y = Vin / Vref`. And funny enough, there's a huge range of sensors that basically output a fraction of their input voltage that corresponds to the measured quantity, `Vsensor = Vsupply * x`. So, if if you can directly tie `Vref = Vsupply`, then when you connect the sensor voltage `Vin = Vsensor`, it all cancels out: `y = Vsensor / Vref = Vsupply * x / Vsupply = x`. And it still cancels out, even if `Vsupply` is some wildly unstable voltage with unfiltered switching noise and microphonic capacitors and a temperature coefficient that would make a thermistor blush.
@@AJMansfield1 ripple is canceled only when the measured quantity is truly a fraction of the ADC's reference voltage. When the reference voltage changes the voltage steps between the quantized ADC codes change as well. Whenever the reference voltage is reduced, the microphone sensitivity reduces and vive versa. Due to capacitances even a voltage divider output voltage will lag behind the reference voltage and thus cancellation is practically not perfect. @James Sharman could however simply connect his R2R network to the supply over a small resistor like 10 - 100 Ohms together with a capacitor in parallel to the R2R. That way a low pass network is formed and supply ripple gets reduced. Due to the parallel resistance to the capacitor the common RC cutoff frequency formula does not apply, but it gets close when the series resistor is much much smaller than the parallel resistor (R2R network in this case)
@@maeanderdev True, definitely an aspect to consider. But also, the capacitance on the input line acts essentially opposite to any capacitance present on the reference line, so if you're careful about circuit topology you really can get away with a lot. (And by "careful", I mean a full paranoia three-way differential pair between the analog signal, analog reference, and analog ground, all three routed all the way out to the sensor and only connected in with the supply voltage via the other traces that connect to the sensor's pads.)
If everything was totally isolated from one another I could have just used the center of the voltage divider for the common audio input. Unfortunately isolating everything is pretty tough.
@@weirdboyjim : You'd probably want to use an eprom, with either a clock-controlled adder chip for the address bits (sorta slow, checks every combination), or with extra data bits to indicate the next higher/lower address to check (lets you check bits individually, but more complex).
I’d like to see a circuit using discrete capacitors. A big one to hold and a small one to add or subtract a quantum. I don’t like OpAmps. I would like to float an amplifier on the capacitor. Isolation transformer running at 48 kHz or floating elco supply power. Sending a charge package using MOSFETs. So actually two storage capacitors. One to each rail. Zener diode to measure the package on the float.
This was very interesting! I never really thought about how ADC is done, it all makes sense in hindsignt but I'm not sure I had expected this sort of mechanism beforehand :)
I remember audio sampling on the Ensoniq Mirage, working with MASOS, reading the phonebook sized manual, interesting to learn that it is not just as simple as A/D, storing the value, playing this back into the D/A and expecting it to be a sound representing the original, there's filtering and also antialiasing. Quite tedious constantly pushing buttons and reading the 2 digit lcd, still, some really nice sounds could be created.
Indeed. This was just a basic demonstration of the tools. To really dig into sound reproduction you would need to start discussing Nyquist-Shannon as well as analogue circuit tricks that I'd rather stay clear of.
I never knew this was the method used by most ADCs given the inherant distortion caused by the temporal delay in the search process, interesting. It would be fascinating to hear a comparision between this ADC and one that uses 8 comparitors, using the resistor ladder to create the fixed comparision levels for each bit's comparitor. You'd achieve a time coherent sample point and a higher sampling frequency, but of course your amplitude resolution will drop from 8 bits to 3.
An ADC with 8 levels only achieves 3 bits of resolution! It takes 2^nBits comparators for that technique. The biggest that I have seen was an old harris semiconductor chip with 6 bit resolution using 64 comparators
That is wonderfull. So little extra hardware but a huge impact ! Talking about the memmory part at the end. Would it be possible to impliment some kind of compression/decompression algorithm? Something like, Record the amount of identical bytes and where they where, store the one byte and some locations to be used at decompression. Can't wait for the next vid !
Thanks Andrew. Obviously there are lots of good ways to do audio compression but it really needs to be more complex than that. You'll find identical samples to be rare, most techniques involve transforming into the frequency domain.
Moving AC to DC is perfectly fine with an OP amp, but it's also possible with a capacitor and a voltage divider. Although that also forms an RC filter network, basically a high-pass. Which isn't going to be a problem for low-quality audio purposes. In the same manner, you can transform a DC signal into AC without having to provide negative voltages to an OP amp. Just put a capacitor between the DC and AC side, typically 100uF electrolytic for audio at line level and high-impedance sinks.
high pass networks were also fine for high quality audio purposes. As long as the cutoff frequency is somewhat far away from the audio frequency range, like much below 20 Hertz, the entire audio frequency range will be practically unaffected
@@maeanderdev Well, the problem starts when the sink impedance is variable. Often seen with (cheaper) sound cards, as the filter characteristic will change depending on which head phones you connect. Also, just RC is a first order filter, so it will have a very flat curve, meaning it's unlikely to not affect low frequencies unless you use unreasonably large Cs. Anyway, for this demonstration, it would have been more than fine. It might even have better high-frequency response than a cheap OP amp, although again not really relevant for audio and a simple voltage follower, where even a cheapo LM358 with 0.7 MHz GBW would be fine. But let's say you wanted to offset a 10 MHz AC signal, using a rather good OP amp with 10 MHz GBW is barely going to make it without reducing the signal amplitude.
@@graealex Opamp gain actually is tremendously important for audio. Distortion induces small errors. Correcting them through the feedback loop needs a lot of gain to achieve really low distortion. High performance opamps often have 50+ MHz of GBP for that reason
@@graealex first order indeed becomes impractical when a small resistor needs to be chosen in favour of a reduced impedance dependence. I had only ever done that with large resistors and insignificant impedance variability. In my case first order was fine. Some modern DACs like the pcm5102 simply include a charge pump and allow filterless operation. Not sure whether filterless is also viable with audio ADCs, since any offset in a recording will introduce a pop sound at playback, which would require a digital filter
Using the op amp in the way I did produced a different offset from different audio sources. I attributed this to different output impedance, at a guess I would need to buffer the signal though another op-amp first but I'd need a split rail to do that.
@@weirdboyjim Of course it didn't. I'm glad you used the binary approximation approach, it's such a great mix of theory concepts and visual proof. Also as you said, it's widely used in ADCs integrated in micros
Put a 0.01 microfarad cap on the output (signal to ground) to smooth out the jagged edges on the output. I highly suggest also using a latch on the output to prevent the gaps between samples.
Probably need to buffer the output through an op-amp as well but understand I was trying to demonstrate the basic principles in as simple a way as possible. The digital outputs are already latched before the ladder, or are you talking about an analogue latch?
@@weirdboyjim I must have missed the latch. Looking at the scope output you had, it didn't look latched, but like I said, I may have missed something. That would be my fault. Back to D/A converters. Nearly all have some sort of smoothing on the output via a low pass filter. Just keeping the curve above the desired high frequency output threshold is the trick. Yes, an op-amp would help with the strength of the signal. If you are using it to actually amplify and not just buffer, then you can use a capacitor in its negative feedback to give it a low pass response. The capacitor or low pass filter acts as an analog anti-aliasing of the output signal, turning the stair stepped output from the ladder to a nice smooth curve.
Another amazing video. I am afraid I am having a bit of difficulty keeping up. The fault is entirely mine though. My attention has a way of wandering about. In addition to my dayjob, I have been working on a little project of my own, that's keeping me busy as well. But keep it up. The A/D and D/A circuitry intrigues me. Do you need that offset for the output stage as well, and if so, how did you achieve it?
In this case he shouldn't need it because he is just outputing exactly what he read, but in case you want to add/ remove a offset to a audio signal, its usually done with a capacitor in series with the output which will only let the AC through, then if you need to add an offset to it simply connect a voltage divider to the capacitor output pin.
I'm outputting 0v-5v which works for that speaker. A simple DC blocking cap would make that +-2.5v to be line out compatible but it wasn't necessary for what I was doing here.
Really cool stuff. Still missing the anti-aliasing and anti-imaging filters. Make sure you stock up on RRIO op-amps and comparators for this kind of digital stuff. Next time make your own delta-sigma modulator!
very cool you could do a circuit that takes an 8 bit value and does DPCM 8:1 compression and less CPU intensive an 8 bit shift register and a simple up down counter is all thats needed.
Pretty cool. Could you tell me the part number for the resistor ladder array you’re using? I’m tired of building them from individual resistors. Thanks.
I'm good thanks. I know it's been a gap between videos but there have been things going on beind the scenes. Should build up a bit more pace over the next few months. They keen to get the more system finished by the end of the year.
Respected, i'm not an expert but, I think LM393 (and op amp cousin LM358) can go from negative (or zero) rail, but not up to positive rail. You would need somewhat bigger supply voltage to a comparator to be able to hugh the 5V input You are feeding in. This can be avoided by one more MSB bit in D/A section set to zero so the output does not go over 2.5V. In retrospect, some op amp buffering, and surely some sample and hold circuitry would increase the quality so much. Sorry for my bad English, Best Regards
We could restrict the ranges just by adding voltage dividers to both the inputs. Understand I was trying to get the basic principle across, keeping the circuit as simple as possible is far more interesting to me as first demonstration of the principle.
Absolut amazing as always. But even after watching the addendum I did not get how it was timed in the first place. I guess playback is faster, so the delay loop slows it down, but recoding is done as fast as possible?
Oh no, both record and playback are slowed down. I worked out I can get the sample rate (which is much slower than playback) up towards 50khz but that would obviously fill memory far too quickly. The reason for the variability of timing is simply that AD requires the 8 step loop and the DA is a single cycle out instruction. I could have cycle counted the AD loop but I just guessed numbers a couple of times until it sounded right. The loops were about 6khz, looking back I could have got a bit higher.
The whole ADC state machine could be done in hardware to offload CPU to do it's own stuff. I did hope you would use the SAR method and you did :-) I do hope that one day this CPU will get interrupts to be able to do concurrent tasks ;-)
Of course, but building the ultra simple circuit like this was deliberate. Once you have build a cpu you can make a choice about these things, building the circuit to do handle it all would involve spending much more time on the kind of stuff I've already done and very little time on the AD/DA bit.
@James, I have not tried this, but can you 1. split the d/a to several d/a's with a bias voltage... and that way the d/a counts can run at the same time and then add the outputs with the bias voltage and out put that.
It's difficult to parallelism like that since each bit needs the higher bits to be correct for the comparitor to work. There are techniques that can do multiple bits at once though.
@@weirdboyjim Very cool! I should have probably asked what the time taken for a single sample was, since it totally makes sense you would delay the sample rate keep memory usage reasonable. I was curious how expensive making a measurement would be especially with increased resolution (10-12bit seems achievable and useful)
@@weirdboyjim thanks for the answer and by the way, how dificult will be to implement resolution 720x480 AND apart from this, will be posible to make it compatible and executable with the NES socket.
@@weirdboyjim using fcos and fsin for real time cosign and sine wave generation int __main(int argc,char argv[],char envir[]) int __ITER,__TWO=2,__TEN=10000,__DIVSOR=44150; long double __THETA,__COS,__SIN; __asm__ __volatile__( "fldpi \t" "fimull %0 \t" "fimull %1 \t" "fidivl %2 \t" "fstpt %3 \t" :"=m"(__TWO),"=m"(__TEN),"=m"(__DIVSOR),"=m"(__THETA) : "m"(__TWO), "m"(__TEN), "m"(__DIVSOR), "m"(__THETA) :"st","st(1)" ); for(__ITER=0;__ITER
