FPGA Logic analyser 

people.ece.corn...
The inspiration for this project came from the analog discovery product and our desire for a multi-tool which could analyze digital logic and output waveforms. In this day and age, accurate and reliable tools are often very expensive. As such, in classrooms and labs which need to have many setups, such expensive tools are not a viable option. Due to this, students are often left without a means of properly decoding logic which can cause frustration in the debugging process. As such, our group wanted to create a tool which would be cost effective for labs while also being useful for students. The solution we came up with was using SoCs/FPGAs to implement such a tool. In designing our project one of the decisions we made was to make our decoding blocks stampable. This means that we can chose how many blocks we want before hardware compile. This allows students to still use our project regardless of the SoC/FPGA system they are using, as they can customize the number of blocks to work with the amount of logic space their system has. For the GUI portion of this project we chose to x-forward our application. This allows students to run our application from their own devices without the need to install python or the various other packages used in the GUI.