How Semiconductor DRAM Went 3D 

In 1980 I was part of a team tasked with figuring out how to make 64K drams deal with the stray radioactive particles in the packaging materials. At that time 16K bit (bits nor bytes) memory chips were in production. The 64Kbit memory chip was ramping up and it was quite a challenge. It's amazing how things have progressed.

They tend to do the crazy stuff first with memory. The fact that it is generally an array of small circuits makes things a bit easier than more complex circuits like the SOC. FLASH is another quite interesting area.

"Branch Education" made a beautiful video about how exaclty DRAM works, with the precharge, opamps, etc.

I was very active in the late '70's with homebrew computing. For Do-It-Yourselfers the static RAM was definitely the way to go at that time. Home memory systems had only a few Kbytes at that time. Static rams were still affordable for typical home computers. Drams required critical timing that made them much harder to use. A joke in the late '70's: >> customer: What's the difference between static rams and dynamic rams? >> clerk: static rams work, dynamic rams don't. 🙂

I recently purchased some low-cost DDR5 SO-DIMMs, and each DRAM chip on it holds 16Gb. That's 16,777,216 times what the Intel's original 1kb DRAM chip held. In fact, the newer chip actually holds more bits for on-die ECC. That's close to 19 million times the capacity in these tiny button sized things! Crazy!!

Loved this - as a memory R&D engineer, it’s interesting to see how they addressed past scaling concerns and how we continue to have scaling challenges as well - especially with those pesky capacitors!

I still can't get over how he says SRAM correctly yet pronounces DRAM as one word 😭

Upper limit = tunneling quantum effect

It's Muons, not Alpha particles swirling 12:01 around in huge numbers. Having done NIR single photon spectroscooy using early CCDs with 12um CCD structures almost 30 years, ago. It was only possible by applying some rigid statistics. Eventhough, Muons caused a huge number of bit flips, which ruined many measures. Frankly, I wonder how they manage to make chips work since then. I.e., there must be a insame amount of error correction going on in chips, because Muons statistically often hit multiple neighbouring channels, and cause electron showers.

Just one note: what causes bit flips are not alpha particles, as their decay length in air is just a few centimeters, and so those produced by cosmic rays never reach the surface of Earth, but rather muons.

I know it's a colloquial thing, and language accent can also affect pronunciation.. But every time he said "dhrahm" as a single word, my brain misfired Been in the IT industry since the mid/late-90s and I can't recall ever hearing it pronounced any way other than "Dee. Ram.", two separate words. In the beginning of this video he pronounces "S-RAM" that way; "S. Ram." Wonder if it's just a reading-while-exhausted on the 5th-take, kind of thing? The amount of work put into these pods/talks HAS to be incredible, even if only considering the time spent on research. MUCH respect for what you do here bud, truly. Love the show :)

You're a great storyteller, I thought for sure trench designs would be picked! 😅 Really, you bring out the continual challenges that were not at all obvious how to overcome at the time.

Instead of going through all this trouble , they should have downloaded more RAM .

I really hated the 1103 chip, so many supply voltages and all the row and column pre-charge signals had to be generated externally. What a pain!

I was working with C1103s on video memory boards in 1974 for Computer Optics in CT. What a memory jog! Another great anthology, thanks!

Every presentation on this channel is nothing short of excellent. If RU-vid has recommended this channel to you, you likely have excellent tastes.

DRAM reads are not destructive like core reads, they simply rely on the gate charge to keep the bit transistor on when you look at it. Refresh is needed because you can never get leakage current to zero so after a while all the charge bleeds out. We saw this in an error in cell phone code where the self refresh was not enabled in time when the proc went to sleep so the memory just bled out and the phone crashed: For standby, the proc was no longer reading or refreshing memory so the chips had a commad that allowed them to do that independently.

I was in Dram manufacturing industry in early 2000 and you are quite accurate about the structures. But i had left the industry for more than 10 years. The last manufacturing process i recall was HSG trench (vertical above gate on ILD).

Industry also needed to move away from lead in solder stacking the memory due to higher durability. At high density stacking alpha particle admission by the tin. Necessitate materials development to low alpha tin to prevent bit flips

Logic transistor R&D: well replacing the gate designs is very hard, we only tried it twice *sobs*... Memory transistor R&D: OUR GEOMETRIC MORPHOLOGY IS WORTHY OF ELDRITCH MYTHOS

There's a great RadioLab episode called 'Bit Flip' which tells grim stories of cosmic rays flipping bits with deadly consequences! 👍😎🎄

This documentary is your best work by far ❤ Fusion of electron microscope images and explanation is something else, I’m learning physics more than business

Wow what a development saga. As someone involved in electronics since the mid 1970's the massive increase in memory capacity is mind boggling.

Again and again a fine Mix of complex interesting Themes "easy" presented Respect for the weekly Perfomance ! Thanks !

great informative and well researched video! As always! You do an amazing job of explaining the details!

Just posted this comment to the Overclockers Australia forums where I spend an awful lot of my online time: "You guys watch Asianometry right? If you don't, check him out. Taiwan-based and has an excellent line into semiconductor-related stuff specifically (works in the industry I believe), but his geopolitical analysis stuff is also pretty well-researched and detailed. I also like his rather dry delivery and sense of humour. Recommended. "

as always I learned a lot and I'm keen to go deeper in next episode!

I would love to see you cover SiC for memory usage, it’s what I studied in university and the thermal carrier density was astronomically low, like 1 in the volume of earth at any one slice in time. I remember calculating residence times in the order of thousands of years. I wonder where that ever ended up, I’ve been out of the game too long.

New Asianometry, Sam O'nella and History of the Universe?! Woooo! Almost makes me feel like I'm not dead inside.

I share your take on the tremendous effort to secure these technologies. Wow!

Love your videos. For when a video about the 3D VCache??

favorite channel consistently!

I love the fact that you are just casually bridging the gap in understanding of these advanced topics for our generation.

I remember buying ram at a dollar or more a MB- spending my rent money and then popping the ram trying to over clock it. Ahh good times

ICs have always been about shrinking the electronic component to the smallest it can possibly be. Sure, transistors are what comprise processors, but capacitors have to be even smaller for ram.

Damn that's some impressive Science, Invention, and Engineering to make DRAM keep getting better.

‘Condenser’ is basically the German phrase for Capacitor. “Kondensator”

I'm a scientist and yet... I understand half of your videos. And it somehow makes me feel smart.

And i though processors were complicated until watching this... this is absolutely insane how they build detailed mega-micro structures like this

So what was Rambus RDRAM? I only remember the hype and marketing, but not much else about it. DDR ended up completely taking the market and RDRAM ended up as the Betamax to DDR's VHS.

I also can't get over his way of pronouncing anisotropic, it's an-isotropic. Great video though.

awesome video !

Love seeing DRAM makers getting some respect for their mind-bending process technologies. Unfortunately, DRAM often gets short shrift because it’s seen as “lagging” in process technology behind the leading edge logic guys, because they’re not making, as you mentioned, transistors like FinFETs, and because DRAM is a commodity where cost is king. However, as you explained, DRAM first went to 3D capacitor structures, which greatly increased manufacturing complexity. But by the mid-2000s (5+ years before FinFETs became a thing), DRAM makers also started making 3D transistors as well. The Access Device (AD) transistor used to be a planar nMOSFET. Hundreds of ADs would be lined up next to each other, then the Wordline was a piece of metal (or poly or whatever) that was laid over all of the ADs in the same row, forming the Gate of all AD, such that when the Wordline is activated, all of the ADs connected to that Wordline are simultaneously turned on. In logic chips, the most important characteristic of a transistor is the switching speed, followed by things like on-current and off-current. In a DRAM Acess Device transistor, the single most important characteristic is minimizing rhe off-current (or I-Off), because that is what prevents capacitor leakage. So, by the mid-2000s, the channel length of the AD was getting to be too short, and I-Off couldn’t be kept small enough to prevent capacitor leakage. Similar amounts of leakage in a logic chip was “fine”, because it only increased power consumption slightly. But in DRAM it was devastating because the whole point of DRAM is to store data without forgetting it. So, that’s when DRAM Access Devices went 3D. But, they did the opposite of FinFETs, in that in DRAM, the Wordline was buried down into the silicon into a trench. Unlike the “trench capacitor”, which was actually just a punched out hole in the Si, buried Wordline is a true trench - a long, skinny, U-shaped trench filled with metal, etched into the Si between the Sources and Drains of the ADs. Hundreds of ADs are formed on a single buried Wordline, and of course there are millions of Wordlines per chip. Now with a buried Wordline, the channel that forms between the Source and Drain has to form under the same Wordline, in a long U-shape going through the silicon substrate. In the manner, the lateral distance between the Source and Drain can continue to shrink (which is required to continue die-shrinks), but the “effective channel length”, which is the total length of the channel as it wraps around the buried Wordline, can remain long. This long channel is what’s critical in stopping leakage when the AD is turned off. It’s also one reason why the switching speed is the AD is slow, relative to logic transistors. Anyway, you could do a whole separate video of the evolution of DRAM Access Device transistor technology. The combination of incredibly complex Acess Device and Capacitor technology are what allow us to have monolithic 4GB DRAM dies now, still still latencies less than 20ns

Fascinating! I’m sure everyone knows how a flip flop based storage device works. Thanks!

OMG, 112 volt memory capacitors. 😅

Duke Nukem Atomic Edition Queen (last level) is designed to fill the golden chips with Physx instructions. The chip exists in new laptops, and it is empty. The game level acts like a flight simulator, ascending and descending. Using steroids you can speed up the virtual plane. When the frameskip stops, you fixed the video card.

“Shrinkage got harder”

superb video.

Jon, it would be great if you could conduct a deep dive in Si Super-Junction MOSFET technology. Specifically considering both TFEG and MEMI construction methods

Image a world of DIMENSIONS. Expand in different coordinates and enjoy the SPACE that is in all directions. It is love. THIRD DIMENSION We are 3D it's real and we walk in the 3rd dimension, and think in the 3rd dimension. Love to love, love to be 3D.

Wow, that was very interesting. And make me wonder about flash memory cells, how they look, especially 3D NAND.

we must not forget who started this all, the scientist: Micheal Faraday.

4D lets not forget spacetime

Thanks!

Nice! Asianometry is a fellow "pronounce all acronyms as if they are a single word at all costs" enjoyer

Makes me wonder what exotic materials they'll develop in the future?

Jon! I have an interesting idea for a new video. The History and Development of the Modern IHS. This has interested me for a little while now.

I get that there is probably a lot of red tape behind patents of each tech. but wouldn't the logical step be to combine the cylinder cap tech with the substrate-plate tech to make it easier to fabricate while also reducing the real estate needed for trench technology?

I understand none of this. . . . but I feel smarter for having watched it.

How does this relate to current research around resistive memory?

At 5m25 the green arrow should be pointing down (you try to shrink d)

What do you mean by memory as commodity?

Could you explain why optane has been abandoned ?

Wow a 120 volt bit!

I have no idea why I watch your videos

Thinks your local electrician inventor, between jobs: Hey, I would make storage and switch as the connection lattice itself. Who needs interconnected nodes when nodes themselves are the interconnect. Nature does it all day. Think DNA.

I just heard recently that Huawei has just released its 5nm chip. Could you make a video explaining this new progress in China? Thank you

How can zero be refreshed?

Daaammnn DRAMuel...

A few dozen milliseconds is not as few. That's an eternity in computer timing. A single 60 FPS frame is almost 17 ms.

Wait, that doesn't sound quite right. K is the Coulomb Constant. It is dependent on the dielectric constant, epsilon, but K assumes a vacuum, therefore setting it at 9e9. But that's just a nitpick. Well done over all!

I imagine that at some point we will not have flat CPU/SOC/RAM chips but we will transfer to 3D computing blocks. But there is probably a very obvious reason why that would not work

My physics professors would argue that the equations for capacitance is: F=ma

2:11 something went wrong

It's not "a-niso-tropic", it means the opposite of isotropic, so it's "an-iso-tropic". Hope that helps!

E = MC2😂. How did that make me laugh

The "high-k" dielectric don't seem that impressive with a k of (according to this video) 25 maximum, compared to for example barium titanate, which can have up to 15,000. However I guess the materials that can be used in DRAM are very much limited by the manufacturing process.

Who is this Semic Onductor?

🎯 Key Takeaways for quick navigation: 00:02 🧠 *Evolution of DRAM: The video explores the journey of Dynamic RAM (DRAM) from its 2D structure to 3D structures and beyond, highlighting the challenges faced in scaling memory capacities.* 03:13 🕹️ *Shrinking Memory Cells: Memory scaling involves shrinking one-transistor memory cells, particularly focusing on the challenge of shrinking capacitors due to limitations in capacitor size and capacitance.* 08:17 ⚖️ *Trench vs. Stack Capacitors: Memory makers faced a dilemma in choosing between stacked and trench capacitors for the 3D structure. Trench capacitors offered advantages in density but had challenges in manufacturing and data integrity.* 14:47 🌐 *Hemispherical Grain Structure (HSG): The introduction of HSG in stack capacitors during the 64 megabit and later generations was a critical innovation, enhancing capacitance values and providing a competitive edge.* 15:41 🔄 *Innovations for Increased Density: To increase DRAM density, the industry introduced cylindrical capacitors in the late 1990s, leveraging advancements in lithography machines. Exotic High K dielectric materials, such as tantalum pentoxide, were also adopted for further scaling improvements.* Made with HARPA AI

You got me with the e=mc^2 I was watching an was dang that it .....wate a min 😆😆😆 good one 👍👍👍

Also the WL/access transistor is 3D since 90nm technology. Samsung was 1st with RCAT. Later Qimonda completely stucked with Trench revolunized DRAM, switching to stacked but also inventing the Buried Worldline. With no money to ramp they could not get benefit out of it. The concept is sill used in todays DRAM. By the way playing around with all the high k materials Qimonda guys found a HfO phase which is ferroelectric and is today basis for the development of ferroelectric memories.

All this tech so Windows can use memory less and less effectively

Babe wake up...

I live in Brazil.

Cool story, bro.

ayyyyy

For any old heads worried, we get one DRAM in

This is a but too high level for me, I’m just not smart enough to understand

e=mc^2 --- HAHAHAHAHAHAHA!!!!!!!! I love it.

Anisotropic, You Rock Freind

i find it weird when people pronounce "dram" as a word. i and everyone i know, say dee ram or ess dee ram. etc. not "dram"

I wonder if someone is checking the accuracy of your videos. I'm a business teacher,and I'm hearing everything you say for the first time, I have no idea if you have any inaccuracies. Do you have any critics on RU-vid and have you listened to their work? Do they (if any) give you useful feedback?

15:25 You ment to say gigabit and not gigabyte? Its an 8 times difference 😅

too many ads, thumbs down

This was a hell of a ride🫡 I loved every second😎

Dynamic RAM. I see what you did there. 😏