Finally, some who explains, how to calculate transistor biasing without mystifying it, and even goes on to show it in operation. Brilliant, and thanks!!!
Thank you so much for this video. I'm studying for my finals and no matter how hard I try to go through the NIDA lectures it simply doesn't explain it as well as you do. Short, simple explanation even a dumb college student can understand. Thank you again!
A better title for this would be how to analyze a transistor circuit. To figure out the bias from scratch you would have some requirements like swing voltage on the output, current limits on the output and through the transistor, etc... I've watched many of these videos now and have yet to see anyone take the "requirements" approach and show how to determine the bias and current components. Still a nice explanation of a transistor circuit.
Now for the tricky part... Input and Output Impedance... DC Switching Applications are easy... try throwing an AC signal through them like Audio... you use a common voltage divider value... say... with a 9 vdc supply and the collector to V+ and a 10k value on the emitter (a common collector NPN buffer situation), a base divide of 100k/15k, and it sounds good with a low impedance signal but try feeding it with something high like a guitar and it sounds muted and weak... then you add a small value resistor of 47k (or larger) between the divider and the base of the transistor and ka pow... the impedance of the transistor input is fooled into seeing a high impedance and the guitar sounds much better... impedance is everything when it comes to Audio and the difficult aspect to grasp when it comes to gain... And I did enjoy your video... simple and effective... what can you tell us about saturation?
This is showing how to analyze a transistor circuit - not bias one? To demonstrate how to bias a transistor you first need requirements of the circuit and the type of transistor to be used. Then you can figure out what resistors, etc... will be required for the input and output of the circuit. This has to be the umpteenth video I have watched and they all do the same thing - analyze a circuit but never show how to create one from scratch given only the input and output requirements.
Heilman has done good work in showing the various DC voltages when biasing a bipolar transistor. The trouble with this approach is the accuracy and the application of this design. - the hfe of a bipolar transistor is SPECIFIED with an variation of (say) 3:1. -A further variation depends upon TEMPERATURE due to the self heating of the transistor -A complication of the design arises due to the magnitude of LOW FREQUENCY AC output signals . Many factors must be considered and juggled..., too many to quickly discuss.
Because the current through the bias resistors is significantly larger than the base current, the hfe of the transistor has little effect on the bias points. Because the collector current is fairly low, the dissipation in the transistor is small (about 15mW), so the self-heating will be no more than about 3°C at the junction. That means a reduction in Vbe of about 6mV, but that is swamped out by the voltage across the emitter resistor, which provides negative feedback and stabilises the bias points. Because the emitter resistor (470R) is very much larger than the intrinsic emitter resistance (25mV/Ic = 9R), the non-linearity of the intrinsic resistance is swamped put and has virtually no effect on the large signal response. Now, of course, all of that depends on a sensibly designed circuit, which the one shown is, so the points made are valid considerations if you have transistors with very low hfe, or you have base bias resistors that are too large, or you have a circuit with high current and voltage, or you have a very small emitter resistor.
How do you find the base current? Why is it that you didn't need to account for this current splitting at that node, but only had to account for the voltage drop V_BE?
Why do you calculate VR2 and not VR1 and then use that to calculate voltage drop between the base and the emitter, when the base is supplied from the positive rail R1 side. What would be the voltage drop be between the base and the emitter if R2 was not there.
HEILMAN HACKATRONICS Does the AC/DC load line mean the maximum output wattage power of the transistor or does the AC/DC load line mean the power dissipation of the transistor? Because the AC/DC load line is selected by the EE designer of the operating voltage and operating current for the transistor and the DC bias Q point which will determine the maximum output wattage power out of the transistor and the power dissipation of the transistor. I'm not sure what the LOAD means in the AC load line and DC load line what they are calling the LOAD.
Ok. Then I only need to calculate the transistor to get close to the middle point between cutoff and saturation considering the gain and the amplitude of the signal imput. It will work kinda class A amplifier (All the time in resistive/active mode) Right?
I always get confused on the current thru R1 and R2 in the first step. Can you assume the current is equal in both R1 and R2 to compute the voltage at the base? Won't some of the R1 current flow to the base and the balance flow thru R2? It would not be a true voltage divider. It seems as if you need a set of simultaneous equations (in a spreadsheet?) to get the correct answer. Or maybe your disclaimer "this only works with a high impedance load" is the key? This makes the current flowing to the base from the R1-R2 junction negligible? But the emitter resistor is much smaller (470 ohm) - is that considered a low or high impedance? I guess it must work - since your circuit measurements agree with the maths. Thanks for posting.
You start by assuming that the collector current (Ic) is about half the supply voltage divided by the collector resistor - in this case 6V/2K = 3mA. Then you make a worst case estimate of the current gain β of the transistor, say 50. That tells you that the base current (Ib) can't be more than about 3mA/50 = 60μA (and probably a lot less). So when you calculate that the current through the bias resistors is 300μA, you can see that it's much bigger than Ib and the effect of Ib on the bias point will be small. if you want to compute the actual effect, then you can use Thevenin's theorem to treat the voltage divider as a voltage source of 2.05V (as calculated) with an "internal" impedance equal to the parallel combination of 33K and 6.8K = 5.6K. If you draw a base current of 60μA through 5.6K, you drop 340mV. so the actual voltage at the base would be 2.05V - 0.34V = 1.71V. Of course that is worst case when β=50, so in most real cases where β might be 200 perhaps, then you'd have 1/4 of the base current and therefore 1/4 of the voltage drop, so the base bias point would be more like 2.05V - 0.09V = 1.96V. Remember that in a real circuit, resistor tolerances can often have a bigger effect than that.
I thought it is a tutorial on how to bias a transistor. But what your doing is trying to compute current voltages for a given bias. You should have shown us how to compute for the resistance of those resistors so that the transistor is in bias condition. Yours is the resistance is already given. But the problem is we dont know how to determine the value of those resistors. Hope you can make another video showing how to compute for the resistance of the resistors to stabilize the transistor.
That's the difference between analysing an existing circuit (which is what this video set out to do, and does well) and designing a circuit to meet a particular specification (which is not the intent of this video). The design process can be complex and requires rather more than a basic knowledge, so it isn't the same target audience.
Matt Heilman at 2.30 you say it is between saturation and cut off. BUT: Vce is much greater than Vre +0.7V so it is definitely operating in saturation right??
For Normal Operation Vce=1/2 x Vcc, Saturation Vce=.2 volts and Cutoff Vce=Vcc Vce must be>> Vbe for Proper Operation Rb Controls Ib Ib controls Ic Ic Controls Vrc Vrc Controls Vce.
In the explanation you just took the current through r1 and r2. What about the base current that splits at the junction of r1 and r2? Should it be ignored?
When analysing these sort of circuits, a simple tip is to look at the value of the collector resistor (Rc) and the lower base bias resistor (R2). As long as R2 is not a lot bigger than Rc, you are safe to assume that the base current will be negligible compared to the bias current through R1 and R2 - as long as the transistor has a β in excess of about 50, which will be true almost all of the time.
You don't need to hold the entire process in your head at once. (I certainly couldn't.) You just look at the circuit and decide what you need to figure out, step by step.
There is approximately 0.7v dropped across the base emitter junction, when the transistor is turned on. This transistor is a N-P-N: Collector - N, Base -P, Emitter - N. A silicon diode is P-N: Anode-P and Cathode-N. in both cases there is a 0.7v drop across the P-N junction.
Vce=.2volts The Transistor is in Saturation Mode.When Vce=Vcc The Transistor Is In Cutoff Mode And When Vce=1/2 x Vcc The Transistor Is In The Normal Operation Mode. Vcc Is The Supply Voltage... We Have 2 KVL Loops Vcc=Rb1+Rb2 and Vcc= Vrc+Vce+Vre Voltage Gain= -Rc/Re I Hope This Information Helps!! Best Regards MR.OHM1970
You couple in your ac signal through a capacitor to the base of the transistor, so that the 20mV pk-pk stays centred around the +2V that the base is biased to. The circuit as shown will accept input signals up to around 2V pk-pk.
If there is voltage drop of 0.7 volts across the BE junction in the transistor, shouldn't the impedance of that junction be taken into account as a series "resistance" with RE? And shouldn't the combination of those two be taken into consideration as a parallel resistance to R2? All of the above before you can calculate the current through R1? Just asking here, because I'm no expert on this. Perhaps you are, but it seems you are ignoring the part of the circuit that is parallel to R2 in your initial calculation. Please explain.
When calculating the dc bias points, the dynamic emitter resistance of the BE junction will be so small that we can assume the voltage Vbe is always between 0.6V and 0.7V for all practical collector currents. In most cases, it's simplest to just assume Vbe is fixed at 0.7V. When you're calculating the gain of the stage, the dynamic impedance of the BE junction will need to be considered. For a bipolar transistor, that is the slope of the Vbe vs Ie curve, and is given by 25mV/Ie, which turns out to be around 9 ohms in the given circuit. because Re (470R) is so much larger than that, we can ignore the effect of the junction impedance. Because the current into the base is a factor of β smaller than the collector current, it means that resistances seen in the emitter are effectively multiplied by β when considering their effect on the base. In this case, there is indeed an effective resistance of β x (470R + 9R) in parallel with R2. However, if β > 50, then that resistance looking into the base turns out to be at least 24K (and probably a lot more), so it only has a small effect on the 6.8K resistor R2.
Any silicon transistor passing a few milliamps of current will have a base-emitter voltage drop around 0.6V to 0.7V. It's an inherent characteristic of all silicon P-N junctions.
Any silicon transistor passing a few milliamps of current will have a base-emitter voltage drop around 0.6V to 0.7V. It's an inherent characteristic of all silicon P-N junctions.
