As an engineer, I have designed fpga circuits and analogue circuits. This is the next generation of circuit design mixing both design types onto a custom intergrated circuit. It looks amazing.
Totally agree: I've only started to scratch the surface with this. RF is an obvious one I'm looking at, but there's just so much that's possible. Loving it :)
It was a pleasure to get to share this with you and a thrill to actually do a design live--a simple one, but we still had to go through some debug during and mystery solving during simulation: can't get a more realistic example, hah! Thanks again for having me Robert 😀
Great presentation Pat. With these new features of making mixed signal ICs I really hope the things get more advanced with ADCs and transceivers. I will continue to watch your videos always. Thankd
@@anlpereira Thanks Anderson! It was "interesting" to do this live on Robert's giant channel. And I think there's no doubt things are going to move fast with the mixed signal. Efabless has been hosting "chipalooza" (analog/mixed signal challenge) to basically create advance open source building blocks, plus all the TT community. It's going to be great 😀
@@projectsspecial9224 that's great to hear: it was truly my pleasure, I hope your students get the itch to try it out and if you hit any road blocks, or just bumps, the tiny tapeout discord has tons of people who are really into this and can help out
Hi! Yes, exactly. An extra step I didn't actually do is, after layout, "LVS" is the step where you use netgen to compare your layout and schematic to make sure you wired things up correctly. And just to clarify, "magicsky" is a shortcut I use to run magic, it's basically an alias to "magic -rcfile /some/long/path/to/sky130/magic.rc"
It's amazing... five years ago, this was impossible without a ton of cash and even then it was a nightmare of NDAs, license servers and gigs and gigs of software. Now, install a vm, watch a video, play along. Crazy. I'm loving it.
wow, after watching it the 2nd time, I just realized that the guy who'm Robert is interviewing is actually the original creator of the Atmel chip... well done Robert.. always admired your passion for creating these pcb boards...
Wow amazing detailed overview - I thought I always wanted to make a chip for fun - but this shows it's really a labour of love required to get a simple chip produced.
I haven't watched your videos for almost a year as I've been more focused on software development due to my current job. However, I greatly appreciate your effort; your channel is outstanding and was a huge motivation while I was studying mechatronics engineering. I'm looking forward to catching up on all the videos I've missed and hope to transition to chip design within the next year.😁😁😁
I used magic while in undergrad at Oklahoma State University. Took a couple of classes with Dr. Stine on VLSI. Absolutely loved it VLSI is awesome. Thank you for this video. The level of niche that CCA design used to be is now on the IC level it’s crazy.
😂😂😂😂😂😂😂 I clicked on this and realised I'm probably not ready for this quiet yet ill see everyone in this lvl of engineering in hopefully a few years 😊 I watched a bit and realised it's the same as going to smd size components just way smaller and each component is layered basically the same as developing a pcb board but smaller and more layers and most likely very similar to pcbway or the other companies ❤
Yes! The process is older (not necessarily a negative if you're doing analog, anyway) and the tools sometimes a little rough around the edges, but the fact you can start mucking around and trying things out, like right this minute, without downloading giganta suites or dealing with licensing... I think it really opens the doors up wide.
Just wait 'til you watch it Gabor :) Seriously, I'm biased of course but I think it's worth the watch if you are into IC design. Let me know if any bits remain unclear after all that, cheers!
I can’t wait for carbon graphene to replace the wiring in circuits in widespread use. There has been recent experiments in attempting to mass produce it, the power savings for more compute for less power seems good.
It sounds very similar to when you have a multilayer PCB with a circuit above 1GHz and so all your strips become inductors and your adjacent layers are capacitors of enough capacitance to mess up the spice model, hence you need software that simulates the physical layout of the board.
I'm with you on this, Tiju--have been trying to put up more IC-related videos myself but it's really great to see the topic on Robert's terrific (and big) channel!
@@PsychogenicTechnologies Thank you so much to consider my comment. Am already your subscriber. I am a software engineer and my free times i teach students about computers. i suggested your channel for lots of students. also ben eater, Zero to asci etc... I am a great fan of you...
@@tijuthomas6793 Wow, that's awesome to hear 😀So we share similar goals: it's great that you take the time to teach... sometimes, it only takes a bit of clarification and it can be the spark that starts a passion or launches a career. In the name of your past and future pupils: thanks!
Just a concern, if the tile that you design is adjacent to tiles from other designers, than how can you guarantee there will be no crosstalk or interference from neighboring circuits? Great idea, though. Amazing how accessible technology has come!
Yeah, the way it works at this point is just one project at a time. So you select project 42, say. Well the chip supporting stuff, the internal MUX, things like that are on, but the only active project is yours. And from this point on, other projects aren't just not clocked, they're basically powered down, so downside is: you can talk between tiles. Upside is: it's very clean, no interference possible, and allows TinyTapeout to offer analog.
Great idea to fill a wasted fab capacity. I don't really understand are they producing a small platter for $10k or somehow mixing multiple unrelated designs on a single platter and selling like a 1cm^2 of it for $10k. Plus the packaging will probably cost an extra pretty penny.
MOSIS has been offering "brokered silicon" since 1981, so this is not new. Because FPGAs really took off since then, its mainly been useful for analog chips.
very interesting 👌I guess for high end processors with billions of transistors , this whole process is automated where designers enter VHDL and the bulk of the downstream stuff just happens ? . Wether using Electric , magic , virtuoso - all tutorials use an inverter BUT I have never grasped the leap from a tutorial to a billion + transistor device
Digital implementation flow is very different from analog and far more automated yeah. There are several extensive introduction courses on the subject on RU-vid. Try search things like "VLSI Physical Design". Also this Tinytapeout is more on the educational side (which is fine) and is missing most of manufacturing, testability, reliability aspects. And trust me, designing something you get one good chip of, it is far easier than 100 millions at a 98% yield during years and years of production runs.
Yeah, you're right. For something massive, you'd use a hierarchical design in some HDL. At that level, you don't actually care about inverters, the process handles all the details. I did a simple, but not quite trivial, digital system in my "Python design of a hardware digital tuner on FPGA and ASIC" and subsequent video (this was in Python -> verilog using Amaranth). For heavy duty stuff, there are a bunch of e.g. RISC V processors you could look at in the HDL of your choice. So you do your dev and testing high level, and once you're satisfied, openlane uses yosys and other tools to transform that into a digital using standard cells, but the most you need to care about it is to run your test suite on the final synthesized gatelevel blob.
1:11:18 so this is where the title pic comes from. I may have missed it prior, but does this mean that in CMOS we have to group nMOSFET and pMOSFET ? I saw some die shots of RCA 1802 and it had a lot of rings. But as I understand each ring connected to Vdd or Vss is made of metal and is connected to doped silicon which completely encapsulates the transistor almost like a Faraday cage? I thought that the substrate would have one of the dopings, and the opposite doping would slide in from the source or drain. Is this to preven dirty effects at the end of these small width transistors? Power transistors can fold the gate inside this ring. I should probably google clock circuits. Also the amplifiers in front of the PLA of the 65C02 probably need power and output pins.
Hi Arne, so you don't *have* to group them, but yes they act as insulation like guard rings on a pcb. Magic by default creates guard rings around each mosfet individually--more efficient, hand-crafted designs, sometimes drop those and create their own around related groups manually. The rings in the examples here are in the local interconnect layer... so, conductive but not super-great (pretty high ohmic)... however, it's down there below all the metal, so the closest conductor to substrate after the poly itself. Another way the FETs are often grouped is with the dopant wells: a wafer of a given type, say p-type, will make creating fets of one kind easy, while the other will need a well of the opposite type to sit in. So if you have a bunch, you'll sometimes see them grouped in a well and then a guard ring around all that. Truth is I still have trouble identifying lots of stuff on pics of decap'ed ICs... the technology used, the era it was done in, there are a whole bunch of ways things seem to change but I think once I can draw a schem from any random die shot, it'll be because I'm pretty comfortable in this world :)
Last questions - The toolchain outlined on e Fabless appears to use ' wokwi' for tinytapeout vs what is laid out in the video . 1. which is the preferred route ? . Can someone please post a link for the VM download that is covered in the video ?
Hi Hedley. There are really 3 levels at which you can play: wokwi gives you a graphical simulator, in browser, that you can create projects with and try out without ever having anything on your own computer and go from that to tapeout. Then there a more traditional FPGA-like flow, where you use verilog (or Amaranth or whatever to get to verilog) to describe your hardware, and go from that to a digital design. Finally, if you want to do analog, or mixed-signal, you're getting deeper in the weeds and have to start using tools to finally wind up with GDS. Each of these can be used to fill tinytapeout slots, which one you use is a mix of preference and what's actually required--in short, you could do anything and everything with xschem/magic, but it would be quite a headache if all you want in reality is a digital inverter (meaning the example in the video was pretty convoluted, since I could've done it with a single component and two wires in wokwi but wanted to show the entire analog flow while keeping it simple enough to not take 5 hours, heh).
@@PsychogenicTechnologies Many thanks for providing clarity . I will go the last route as although more involved , really provides an appreciation for what's under the hood , and the nuances that support the notion of the 'devil is in the detail ' . I am almost done with setup on a VM , the outstanding part to install and setup is the PDK, as most of the instructions in online videos were from a year ago so either don't exist , or have missing parts - We often use Efinix FPGA's which has one IDE and then drag and drop blocks like Ethernet Mac , Risc-V cores etc , but the tiny tapeout route seems to provide a rich and fun learning experience 👍
@@hedleyfurio P.S. I totally agree on all the really interesting stuff hanging out with that devil in the details! On one hand, kinda glad it wasn't possible when I started with TT, because it's a lot to swallow in one go, but now that it's here, I'll probably be focused on mixed-signal all the way.
To build my own chip ,therer is a factory in hongkong that does ghat ,i need to code the circuit on the timing i want i want to ,create a story of turn on wait ,turn again ,include laser sensor if cat or anythibg in the vicinity ,also i wwnt to study how the 3d printer moves ,its programmed on arduino ,but who makes these arduinows ,ocourse designed in usa ,but the pollution in china ,how malicoius
Hi, I guess it's all relative... compared to a few years ago, this is dirt cheap and the least expensive I know of--but you're right, it's far from completely free. I just don't know of any other options--other than going the Sam Zeloof route of the home chip fab (which is probably super expensive if you can't just find all those tools, but also super fun)... honestly, the best way to cut costs would be to pair up: with a few friends, each buy tiles to put in projects, and then only get one or two of the chips/demoboard etc... all the projects will be included, and you can experiment with each in turn.
@@PsychogenicTechnologies Hi, Thanks for the reply, that's good idea for a "few friends buying a tiles", I'm experimenting on building one but it can not be implemented, high cost for DIY prototype, the fastest way is on Xilinx or Altera, but I have interest with DIY a chip :) Comparing with building a PCB, cost only $5 for dual layer, why not with the chip ? for example $5 for a one nano wafer ? it's my humble on building a chip. Kind regards.
