Abstract:
With the development of Internet-of-Things, the demand for low-power radios and low-power sensors has been growing rapidly in the past decade. The Analog-to-Digital Converter (ADC) is one of the key building blocks in these systems to digitize information from the analog or RF domain to the digital domain. In this tutorial, an overview of low-power ADC architectures is given first, where the strong and weak points of each architecture are described, and limitations are investigated. Besides conventional architectures, several new developments like hybrid converters and noise-shaping SAR ADCs are introduced as well. After this overview, the talk will focus on low-power SAR ADCs, and the limits of power consumption, resolution, speed, and chip-area will be studied. Various concrete design examples from literature will be discussed in more detail to show some of the latest techniques that enable very low-power ADCs with state-of-the-art performance.
Bio:
Pieter Harpe received the M.Sc. and Ph.D. degrees from the Eindhoven University of Technology, The Netherlands, in 2004 and 2010, respectively. In 2008, he started as researcher at Holst Centre/imec, The Netherlands. Since then, he has been working on ultra-low-power wireless transceivers, with a main focus on ADC research and design. In April 2011, he joined Eindhoven University of Technology where he is currently an Associate Professor on low-power mixed-signal circuits. Dr. Harpe is co-organizer of the yearly workshop on Advances in Analog Circuit Design (AACD) and analog subcommittee chair for the ESSCIRC conference. He also served as ISSCC ITPC member and IEEE SSCS Distinguished Lecturer and is recipient of the ISSCC 2015 Distinguished Technical Paper Award.
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19 окт 2020
