New 2nm IBM's transistors explained 

I am a student, I would love to work for tsmc does your son have a LinkedIn?

@@davidporterrealestate I do not think any of that is trade secrets but still putting the sons name up would be foolish.

Will 2nm be available in 2024

@@bigrunts9768 2025

As an engineer, I need to know how much real estate I have, so the number of features per area space is exactly the measure I need to design from. There are marketing specifications but that is not one of them.

I think the nanometer number has something to do with the *reproducible* alignment accuracy between the features of *different* masks over the width of the entire wafer. For example, many features of 5 nm chips will rely on the alignment between different mask layers that is consistent to within 5 nm. [HINT] Wherever you can align Critical areas of masks at right angle to the features of adjacent layers, that's easy. Because the actual *location* of any intersection at right angles is coincidental but still nearly *inevitable,* instead of requiring tight control.

what part of this industry do you work in?

it's called the cost of exploitation versus the cost of the exploration ... how much it cost you to find a new process in comparison on how much it cost in using the same old process, this equation actually carries from an industry to another and so, if any company didn't manage this equation right it will fall soon or later, I managed to create a small company in my country morocco two years ago just before the pandemic and what I can say that this is 100% correct.

I'm happy to hear it!

@@AnastasiInTech MSOE was My school but they didn't offer computer hardware at the time I went? 1974 but been working hardware from that time starting with UNIX mainframe auto production plants! keep pushing people into advanced Engineering degree"s. as far as the non diverse engineering work force in 1974 we had 6 female students at MSOE today I believe it's way up to 4% of the student body? natural selection most women don't like lonely work on your own jobs?? what do you think? like your videos

@@AnastasiInTech so one_nm + fin_fet + all_around >= god_damn?

Hahah:) Thank you;) yes you are right regarding the inner child :):):)

Actual structural size has gone up slightly. 0.2 nano-meter is possible but the features could not be used for thermodynamic reasons. The challenge of tall structures is heat not size. There is no point in putting more features on the chip than you can power or remove the heat from.

@@collegiateindependentstudy6437 No point? You get to publish the smallest feature and sell chips so poor in yield you cause a chip shortage with your stupidity.

@@earthengineer8344 Well, OK. Yes. there is that.

@@collegiateindependentstudy6437 So TSMC's hubris caused the chip shortage?

@@edocioprovost1896 I didn't say that.

Jump into the jumps tech of electrons

quantum processor

I was told it is already over 10 years ago

Bruh, I remember when they thought we wouldnt break 15nm ......

@@SpeedDeamon95 moores law is dead nonetheless. and i think they became stuck on 12nm

Hi Jay! Thank you :) Glad to hear that!

@@AnastasiInTech cant wait to get 1000 fps in games when we will get it

Thank you Asya❤️

@@donniebaker5984 yes you right the problem is that the manifacture companys not real honest or don't use them, when the say about how small now there circutes in the cpu are. It would better that the comanys have to give the real nm specs or say what is, in which size. But at 0.1 nm anyway is the end, maybe als with 1nm .

X ray lithography is not new. The process is not economically viable for mass production. Also, each EUV machine takes 6 months to build, and sell for about $150 Million dollars, so imagine a gigafactory full of such machines!

@Gary Menezes They are nowhere near the size of 2nm transistors but the marketing makes people believe that they are. In theory that would mean that they would have 430 trillion transistors per square inch if they had 2nm transistors. At the moment they are lucky to have about 500 million per square inch. They are about 25 doubling cycles of those types of growth figures. Now I am being very conservative in regards to that.

Electron beam epitaxy! Then there is molecular electronics. Take chlorophyll as a photovoltaic receptor for instance.

Vertical

You do not think what is over? Moors law is not shrinking transistor sizes.

Agree! DoJo is a prime example of continued density growth. Moores law should be defined in quantity of useful compute per given area.

I'm glad you like it :)

For larger tech nodes like 65nm, 40nm, 28nm nominal supply voltage was going down as well. For new nodes not so much E.g. 28nm - 0.9V, 16nm - 0.85V, 5nm - 0.8V.

Search nokia 3310 vs 1 million volts

Yes there are more new technology in the pipeline. The next step after GAAFET is CFET (Complementary Field Effect Transistor) this is basically two transistor a P-type and N-type stack on top of each other.

Hi, we are not that close to the silicon atom width. A silicon atom is about 1/10th of a nanometer in diameter and the smallest structures made nowadays are about 5nm wide which is still about 50 atoms wide. At some point we will reach the limit where we can't get smaller with conventional silicon. What can we still to increase performance: 1. Use a different material with better electrical properties. For example parasitic capacitance / leakage. 2. Optimize the geometry. 3. Use a different type of transistor with software controllable characteristics (Makes it possible to turn NAND gates to NOR gates etc.) 4. For example: Improve scheduling and other design choices within a microarchitecture. etc.... Right now it does not seem that quantum computing will be able to perform classical computer tasks such as video playback etc. They are very specific machines that excell in very specific tasks.

Nope it’s not

some company has maybe google has already made special purpose matrix multipliers using light computing. but again special purpose matrix multipliers may not sound as exciting as cpu but could translate to light computing based cuda cores un graphics car and could revolutionize the gpu industry

@@anandsuralkar2947 Very interesting. I think I saw something on that, not too terribly long ago. The intriguing part of that article I read way back when was that it entered another order of magnitude smaller, using photons. But if I recall correctly, there was no compatibility, and no one could figure out how to bridge it with current processing. If it is workable, someone will eventually.

nah, most of it will be dark silicon

Thank you :) Yes, I will consider to make such a video in future

Moore's Law was broken some time ago, or at least the industry couldn't keep in lockstep with it. Fabricating multiple cores onto a single "chip", and operating them in parallel, is an industry response to the distortion of Moore's "constant". They couldn't keep increasing the single thread execution speed at the expected rate, so they took away most competing loads from a critical task, and the consumer was mostly satisfied. A four-core chip can potentially run four independent single-thread tasks at full speed. So, in some sense it is 4X faster, *but the original promise was a single core running four times faster.* Now, a lot of compilers will easily rewrite single thread code so it has prefetch and disc I/O buffer routines on a different thread or core, or even on a different server. The compiler may also, with some control flags set, rewrite code so that it is _record-locking_ instead of _file-locking_ and this permits the records of the file to be hashed onto many different *file servers,* so that *many* records can be pre-fetched simultaneously, in parallel. Other improvements in parallel processing will dispatch records to any available *compute server,* along with the task. Again, all originally developed to totally bypass Moore's Law. The hardware industry may also try to assure that some cores have less effect on the heat dissipation capacity of a specific core, so that one core can run -hotter- faster than the others (look for a single core "turbo" or clock speed increase). The image of such a chip may show much of the memory, cache, and support circuits in the center, with one core rather isolated physically from the other three. Finally, Moore's Law promised power dissipation halved every two years or so, but that also could not be achieved. So-called octocore machines are actually two different sets of four cores. Many tasks can be completed *in the background* at a leisurely rate, and can all be run at a low clock rate. This greatly saves on power. Four other cores still run much faster, and are used to process things that would irritate the hell out of users, if not completed promptly. For example, don't you hate when your smart phone cannot echo the characters you are typing into the dialog box for a second or two? Wouldn't it be even worse if the keyboard locked up, or your game was laggy? So keyboard, gestures, screen image updates are all high priority. Most apps in the foreground are running on the four faster cores. But as soon as the phone is "idle", the slower cores take over. They may also take over if the faster cores overheat.

@@imconsequetau5275 Moore's law is not broken and it is people's lack of understanding that is at stake here. The semiconductor industry has been on a marketing pathway for decades. They have sort of convinced people that Moore's law is to do with size of the transistors that they are marketing. Moore's law is about the number of transistors that can be put on an integrated circuits such as 1 square inch. Per square inch right now the number of operational transistors is about 500 million. And the doubling period of 18 months has held up. Not every company that is involved in this has kept up with that figure because it is not about companies keeping up but the level of growth of transistors per square inch in the industry as a whole. So what we really have is companies pretending that they on an individual level are somehow producing Moore's law level growth every 18 months. For them to keep this promise up they all would have to have completely new chip sets every 18 months that double in capacity.

Thank you for geeky :)! No it is not genetics, I work out a lot and spend a plethora of time cooking veggies... :)

@@AnastasiInTech Are you a vegetarian?

With effort :) Yes, It is roughly 20h for research, 2h filming and 20h editing :) Thank you ! Yeap, these marketing guys are smart 🤓

I don't know why but it kinda throw me off

Shut up

@@ryandavis1057 ok

People are confused as Moore's law has nothing to do with transistor sizes and is an observation about how many transistors can be operated on an integrated circuit. And it does not matter if it is 18 months or 36 months. 2nm does not mean they have an integrated circuit where each transistor has a foot print of 2nm. That does not mean they have 10 trillion transistors per square inch. At this point they are lucky if they are near 500 million per square inch. They probably have another period of 30 doubling cycles before they reach the actual theoretical limits of space in terms of how many transistors they can squeeze onto an integrated circuit. And that does not take 3d stacking into account or other types of 3d architecture. Finding ways of dealing with impedance and leakage is really the challenges to be faced.

Check out TSMC InFO_SoW

Thank you so much 🥺❤️

It will come :)