My instructor actually includes your videos as part of the computer organization and architecture course! I love your videos. Very-well explained and amazing visual diagrams!
This so takes me back to Microprocessor Programming when I was at college in the early 1980s. It was the Motorola 6502 then. But like clockwork, as soon as I saw that hash sign I thought "immediate mode". Funny how it comes back after all these years, and I went into electronics rather than computers. I also remember "accumulator", "zero page [register]", "indirect indexed" and "indexed indirect" addressing modes.
Question! how do you know what addressing mode is being used by the opcode based on the bits ? i see that 2 bits are allocated to it but how do you know what mode it specifies? i been looking everywhere for a answer and im struggling to get one!
register direct addressing mode: if the operand is stored in a register, it is known as register direct addressing mode(FASTEST) register indirect addressing mode: if the register contains the MEMORY LOCATION of the value, it is known as register addressing mode. immediate addressing mode: when the operand of an instruction is the actual value to be operated on, it is known as immediate addressing mode direct addressing: if the operand is the memory address that contains the value to be operated on, it is known as direct addressing indirect addressing mode: if the operand is a memory address of the LOCATION that contains the memory address, it is known as indirect addressing mode(memory has to be accessed TWICE) * NOTE: accessing the memory is more time consuming than accessing registers
Questions: 1) What sort of computer might we be carrying these instructions out on? 2) WHY is register-direct addressing faster than going to the memory? Are the registers themselves not RAM in their own particular way? Or does it change things in that they are on the main processor chip? 3) What are the factors that would make you choose one particular method over the others, especially if it comes with downsides?
(Answer to 2) Basically because the ALU cannot directly connect with the memory and would need the Memory Data Register in between to do the Data Transfer.
Excellent explanation, but one query I'm not sure about. In 6:10, you show that the value in the PC is 101, but you show the "BR +3" instruction at address 100. If that's the case, how does the PC read the instruction "BR +3" when it's at the previous address?
The program counter stores the address of the next instruction to execute, which is in 101. The instruction currently being executed is at address 100.
At 1:10 you said "Fewer bits for the operand code means that (Fewer memory locations can be accessed directly)" the part that i have written in brackets< what does it means, the term directly has always left me confusing like what is "directly"? Can you please explain that? Thanks.
Perhaps the video I uploaded yesterday about RISC and CISC will help (link below). Suppose you have an instruction which adds a value to contents of the accumulator. The operand of the instruction could be the actual value you want to add, so ADD #25 means add the number 25 to the contents of the accumulator. This is called 'immediate addressing'. If however the operand was a memory address of a location in memory that contained the value to add, this is called 'direct addressing'. So ADD 25 means the value to add can be found in location 25. When I say "fewer memory locations can be accessed directly", I mean that fewer memory locations can be accessed with direct addressing. ru-vid.com/video/%D0%B2%D0%B8%D0%B4%D0%B5%D0%BE-6Rxade2nEjk.html :)KD
@@ComputerScienceLessons that's absurd. Instructions and address modes are specific to each processor family. And when very similar instructions do exist, the mnemonic names and register names will differ.
