Simulating other 6502 machines: Hopper 6502 SBC Part 11

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Changing the port addressing using the CPLD to accommodate port addresses for other 6502 computers like:
- Ben Eater's breadboard 6502 (#define BENEATER_IO in R6502.asm)
- X16 Commander (#define X16_IO in R6502.asm)
- etc.
Motivation behind my original zero page port mapping:
www.hackster.io/michael-cartw...
CPLD files on GitHub:
github.com/sillycowvalley/Hop...

Опубликовано:

27 июл 2024

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Комментарии : 5

@Coffeenator3000 21 день назад

Really been interested in the MECB system.

@biggertigger 21 день назад

Mine is in the mail. I'm first building a 6502 version and then later I plan to build the 6809 version (which is why I started working on a 6809 Assembly toolchain for Hopper).

@tlclstuff 22 дня назад

BE6502 Memory map is: Ram - $0000-$3FFF 6551 - $5000 6522 - $6000 Rom - $8000-$FFFF

@biggertigger 21 день назад

Thanks. You could tell that I spotted that I was wrong mid-video. These clash with the 32K SRAM on our board. Easiest fix is to configure the heap to end at 0x4FFF for now for the BE6502. Corrected and tested: (PLD update is easy .. if we abandon 12K of RAM for 2 ports) github.com/sillycowvalley/Hopper/commit/6384669248ebc17fcef095abddf55e64f2445bcb

@DavidLatham-productiondave 21 день назад

My 6502Retro ROM begins at C000 and ends at FFFF. When I make the ROM image for the SST27F512 flash, I concatenate each of the 16k images together and flash them all at once. So the assumption that ROM ends at FFFF is perfectly fine. 😊