Always find funny when they try to wow effect with new terminology. They are already 3D ;) but to one of your point, I think heat is a major factor. I could argue, semantically, that the future is 2D+1D. A 2D layout could maybe profit of quantum behaviors, efficiency, lower heat, density… And integrate vertical, 1D to the next layer, that could be a heat transfer, nanotubes are really good at that in 1D direction:)
Always great to see the new technologies you see coming in the field! So Tesla’s dojo chips are going to be taking advantage of some of these new processes. Very interesting. I remember seeing the power and cooling being vertically integrated but I did not realize others were designing so much in vertical integration. It all seems obvious when you present it… of course! stick the memory on top and reduce the latency that way! Lol, but I am sure the complications of HOW to do it must be crazy hard to crack. Those different bonding styles and materials being used to allow the chip to chip communication and how to cool it all.. it’s wild 🤪. Nice to see Moore’s law always finds a way forward The 🎄 looks great! Happy Holidays!
Your videos are such a treat. I learn so much from them. Thank you! I would love to see a video about the manufacturing process of modern chips. The machines used and a breakdown of the process and such.
Thank you so much for taking the time to explain how computing will be handled in the future. What I think...the ultra complicated controls of spacecraft will be needing massive computing in an efficient, small, light weight package. Power consumption is already an issue with electric automobiles, and upcoming autonomous vehicles are going to require a huge amount of computation, so these developments are going to become more and more important in the next few years. Thanks again!
Can you please make a video about Silicon Photonics and chips build on photonic technology? Great video as always. Рад видеть что есть видео на такие топики в Ютубе.
Besides heat dissipation question, I'd like to know more about the layers are aligned. I think it's mind blowing that you can align the interconnects when the density of the connection points is so high.
On a chip with tens of millions of transistors, there are only about 1000 connectors. The connectors a so much bigger than the transistors that it is not a big problem with stacking. The heat is a way bigger problem.
@@onlymediumsteak9005 That could actually work. but if you cant shrink more the power usage will be about 10-15 watt per layer. so the power will go above 100 watt soon. its not doubled unlimeted.
@@erkinalp Yes. But the chemical Insertion reaction can only be applied on a waver with a light source that is not available and never will be because the wavelengths are too small. Wavelengths are much larger than a single atom. They already struggle with the wavelengths now. They use water drops to compress them now bit, but there is no idea yet how to scale that down by some magnitudes needed for your idea. Then there is another insertion method, but that method is way too slow. To insert all the atoms, you require many many years to insert them all for just 1 processor. The process is just too slow and needs, if you calculate it by the same more's law, a few decades at least to develop. Good thought anyway. Thanx for posting.
Great video. Would be interesting to see a video on photonics and its industrial use cases as well as its potential in the consumer market in the coming decade. Cheers
So interesting:) But arent there issues with Heat dissipation?? I suppose the "lower" layers of the chip would be harder to cool? And btw the trees look great haha
I think they will be designed much like dojo where you have heat sinks and or cooling between levels. You can also run a coolant pipe vertically down the center of all chips and place compute chips there and the low temp items around the outside of the SoC.
I remember seeing something fairly recently that was being done as part of a research project where they were putting cooling channels directly into the silicon dies. Think of how the water channels work inside a water block... But just imagine it inside special non-conductice layers inside the silicon itself. This would work really well and can work with multiple layers much like how they connect using TSVs.
Linus actually talked about it here... ru-vid.com/video/%D0%B2%D0%B8%D0%B4%D0%B5%D0%BE-YdUgHxxVZcU.html - this was the video I mentioned in my previous comment. I'm sure it should be fairly trivial to make this work in 3D early enough. The heat dissipation is massive.
One should also recall that in the Terminator film franchise, the prop model of the T-101’s chip was purposely made to look as though composed of a number of cubes -- a prop artistically inspired by thinking about hypercubes. This inevitably gives the impression that data does move up and down within the fictional computer chip, which would qualify the fictional device as a 3D chip similar to those you describe here.
I remember when I was a computer engineering student years ago, people used to talk about the end of Moore's Law. And I asked, why not to stack chips together? Now it's happening!
Super interesting! I find it difficult to be certain about the future direction. One theme is clearly these 3d chips, possibly at some point with liquid cooling as used in some of the Cray supercomputers, another theme is neuromorphic chips that circumvent many of the heat extraction troubles, by not having a clock and operate like human brains, another theme is quantum computing. It may be that all these themes and possibly others I don't know of have applications and all have long future developmental time lines. Then there is the limit of atomic size with a silicon atom being approximately 0.2 nm, so that a 2 nm track is now about 10 atoms wide and presumably can not get ever get below one atom. This is the current limit of electron microscopes. All of these things point towards an end of Moore's law in the next few years, or am I missing something? Loved the background Christmas tree. Hope your Tesla car is like new now. Thanks for sharing!
Stacking chips certainly seems a logical step forward, but the most important issue is heat. How will they manage that? Isn't stacking practically gluing two processors on top of one another, and isn't heat dissipation a big issue already? Do they have some new ideas how to transfer heat? Spreading the dye allows for bigger area to dissipate heat to the cooler, how would be an exaggerated example like a cube cpu be cooled? Wouldn't the core, inside melt while the outer layer is barely hot?
Point 1 - Well presented order of information, it was easy to understands which is a nice start and a good sign. Point 2 - You have the right idea for people who are new to some information on thing that go on with computers so you channel would make a good start for people to start with before they watch technical information. Making people aware that things exist in the first place lets them be aware of something they might be intrested in getting to know more about or things they should be preparing them selves for, for example being informed that a processor will have hardware decodeing for a given catagory which that person may find useful then they can look into that before they buy the hardware as epos vox found out with streaming and the i5-12600k. So yes there is a need for youtubers who are making people aware of information video. Point 3 - Can see you are really positive in your presentation and personality approach which is always a good thing for any youtube we need to see more people showing they enjoy what they do so I will give you three positive thumbs up. Keep going with this apporach and hope to see you be the next Linus tech tip of the information awareness world in the future. We all have to start someware. best of luck.
Thank you for this wonderful explanation of the newest direction. I can't help but wonder, as many others here do, how cooling will be handled, and how those systems evolve with new/better ideas. Well done video.
Great Video and great animations. Just a small correction : Intel has already launched product with the 3D stack codenamed "Lakefield" in June 2020. However it is discontinued as of now by Intel. Meteor Lake will be launched in 2023 with next generation of Foveros/3D tech.
I studied and worked in electronics for years before I realized that integrated circuits were planar in their construction with layers of metal above for routing. I had assumed that they were always 3D and that this had been done long ago (this was in the early 1990s). I was shocked to learn this was a futuristic pipe dream that was decades from realization. I have now lived long enough to see my naïve assumption realized.
very good news regarding the development of new technologies in transistor manufacturing. It would be even better if the chip makers worked with each other. And don’t be hampered by licensed technologists. The whole explanation of the operation is great but I'm worried that the transistors will overheat and break down in the middle part of the chip. so I would like to see a vertical nano graphite tube or something similar to facilitate heat removal.
Love it, let’s bring it on. Merry Xmas, enjoy winter in Vienna, it is a beautiful city. Wish you all the best from Prague, it is also now nicely Xmas decorated :) P.S. My dream is to download a design of any electronic device from the internet (e.g. mobile phone) and 3D-print it completely including battery, display, case… I would not mind if it’d take a week to print it.
Great video, 3D is the only way to overcome Moore's Law which is bottoming out on the 2D level. BTW CC sucks @ 1:32 "leave me know and trust lowest Klaten Astagfirullahaladzim" 🤔
My question, as pertaining to Intel specifically, will they use 3D stacking technology for their current CISC designs, is it a hybrid of CISC and RISC or will they be moving to RISC exclusively? By the way, this type of technology was actually mentioned in the "Terminator 2" movie. Check it out!
A hybrid between more powerful cores and less powerful cores. Both types technically CISC x86. x86 instructions already get converted into 4 byte long RISC-like micro-operations.
Cooling 'em is gonna be problematic though ... more forward thinking designers will want to integrate cooling channels or heat pipes in the design sandwich.
There’s a number of connectors on each chiplet they count in the hundreds/thousands what you’ll need to do is to have all of those connectors redirected around the heat sink. Having full sized heat sinks is not really a feasible thing or do. The tech they are looking into are : -some kind of water cooling, even some micro tubes around the entire chip (micro tubes that go between connectors) -Looking into other materials to build the chip. Silicon is not very thermally conductive. But there are some silicon alliage or other weird stuff that are great to make both chips and move heat around. Howether, today it’s mostly not feasable because to complex and/or expensive
seems like the natural progression. I know nothing about chip design, and very little about integrated circuits, but interestingly when I was thinking about how a chip or a integrated circuit was made, I assumed it was stacked because in my mind that was the most efficient.
yes, but stacking decreases the average wirelength, which decreases the energy needs for those chips stacked, compared to the same chips next to each other.
AMAZING stuff. I heard IBM came out with a new product. I call it that because I do not know how and why one is better than another. and I am sure some are more applicable to another depending on there various strengths and weaknesses? I have not heard much of IBM in years.
just a follow up on the background music, the high repetitiveness and swoosh pitch toward the end is actually annoying af. But nonetheless, I learned a great deal in your videos. Thank you! Just would like to concentrate more on ur actual content.
3D chips in increasing high performance only really make sense with magnetic or optical technology, otherwise interspacing with cooling. But, if you have up to 40Thz magnetic, or 1 million times faster than normal optical chip, you have enough performance for most things.
Anastasi, thank you for your coverage of chip technology. Can you cover what will come after the silicon chip like graphene chip and photonic chip once the current state of silicon based chip reach the physical limit, even with 3D tech? Also, how many years are we away from reaching the physical limit of silicon based chip? Thank you.
next step will be stacking soc's then next will be making the gaps more smaller next will be changing material from silicon to other and then they will change the way the chips calculate using quantum computing
Объединение разнородных чипов в один блок без должного охлаждения будет приводить к серьезной нестабильности в работе. Получается, что процессор разогревает находящуюся на нём память и графический чип греет эту память и все друг-друга греют. В общем, место сэкономили на чипе, но потеряли на модулях охлаждения.
Mmm it sounds nothin particular : the problem no one did it before is heating. It's now more required by mobile devices. In a decent pc you might appreciate a second integrated video card in case of failure but most of the time you want a videocard chosen indipendently from cpu. So I think this new solution can improve mostly mobile and servers but not that much workstations
Yup, when you run out of X and Y, the logical move is Z (in this case, height). But this is indeed a quantum leap because it absolutely raises chips to a new level of performance in the factorial sense. I am very interested to see what will be done with this very exciting technical advance.
If the future is SoC like M1, how RAM manufactures will react? Because CPU, GPU, RAM will be made by the same company, and also the issue of non upgradable desktops...
RAM manufacturers will simply adapt by selling their IP for RAM components like ARM does with its processor cores. Chip designers will simply purchase the license to use the RAM manufacturer’s design and incorporate it into their own custom SoC and wrap their own IP on top of it.
Nothing. Just sell the RAM dies to SoC makers. The Apple M1, M1 Pro and M1 Max integrate separate RAM dies to the CPU/GPU/ISP/AI core die in one package. The RAM lies in separate dies. It is not optimal to design RAM on the same die as CPU/GPU. They only put some L1 and L2 cache in the same die as CPU/GPU. Those cache RAM's size is small.
I am interested in the use of photonics and on the fly transmissions in a crystal matirx....and then there is genomics...we are biotic bots in spaces spacing out.
PLEASE consider getting whatever equipment is necessary to improve the sound quality. I tried very hard to watch this video but after 8:10 minutes I gave up because the sound was so bad.
Hi , I want to pursue a career on digital design or verification front end. Does ending of Moore's law affect the job market ? If so may I consider mixel signal or physical design ? (Masters )
Stacking is nice, but this technique cannot double the speed every 2 years. (More's law). Stacking is limited because of the heat. Going a lot smaller cant happen too because of quantum jumping and tunneling. The next big jump will be quantum computing and off-device computing, where part of the calculations are done on a remote server. To make computers faster in the coming years, a lot will be done by smarter programming and better compression techniques. I.A. will also fine tune the way we calculate so that programs can run on "slower" devices. It will be a mix of many fields that together will move us forwards. Before it was almost only hardware that speeded up, but now it's a broad effort.
"technology limits". Why say that, to me, it just does not make sense. I am sure they said the same when they were building a 144kbs US Robotics modem. LOL. The limit we reached is not in technology but in current knowledge. We ran into a wall that needs to be taken down to move forward! .
Intel also should be at par with apple, s m1ultra chip technology. They should not only manufacturing micro chips with old technology whereas they should invest their profit which they have earned till date in manufacturing chips with latest technology. Now artificial intelligence based robots are being created all over the world. Highest memory power is required to activate these robots. Hence processors in these chips with multi core transisters should be produced with neural network. All big chip giants like intel, samsung and ibm etc., should keep this in mind to copeup with future scientific advancement . Scientific advancement has gone to himalayan heights. Advanced technology in manufacturing computer chips is very very essential for ai based machines and robots. Thanks
God, you are so cute, and love your voice! Plus super smart, awesome. I wish I could pick your mind apart about computer hardware and software. But I'm way past in that. You would have loved to get hold of one of my computers that I made for people. It would blow most people away! Peace and love to all
after seeing how photonic computing can be up to like 40000x times faster and maybe 1000x less energy consumption and more, its hard to care about stuff like these video too much...i wonder if it would have been better to not know
I don't understand why AMD don't put RAM under CPU. I though most heat caused by CPU, which you will want it closer to heat sink. Am I missing something?
