Hi Man, sorry for being slow in getting back to you, and thank you for your comment. My accent is a bit weird; English is a learned language for me. Tam
I’ve worked on military avionics, and I’m surprised this is even a question. FPGAs are used in EVERY application where you can’t get an off-the-shelf ASIC with the performance you need. This means FPGAs are EVERYWHERE in embedded systems - especially ones with high speed data or signal processing. It’s not just the military. Although in the military it is almost a requirement because of the security features in FPGAs. Boeing/Raytheon/BAE aren’t going to just send a classified avionics design to TSMC! None of these devices are produced in the quantity to make it cost effective to fab an ASIC in the first place.
Yes even medical equipment that not in high volume production eg CT machine still use FPGA ,it 's cost effective , Proprietary protection ,and less menufacturing process.
In fairness to ASICs, we DO have fabs in the US capable of making the sorts of ASICS you'd need for a missile. In fact, there's lots of military contracts for custom chips and those require them to be made in the US, if at all possible. You might not be getting the latest, greatest 5nm process, but you don't really need that for these. But the points about reverse engineering are quite valid - you don't need access to the masks or design to reverse engineer a chip. People like Ken Shirriff can do hobbyist level reverse engineering of old chips. For more serious stuff, there's companies that will reverse engineer a chip for you (for a cost, of course). One of the ones I know of is TechInsights (formerly ChipWorks). They can do reports that reverse engineer a chip and even give schematics, just by looking at the die and maybe doing some de-processing.
@@dougaltolan3017 I know that sounds kind of like an oxymoron, but you can definitely have off the shelf ASICs. You can actually go to Digikey right now and find chips labeled as ASICs. For example, they have a chip labeled as an ASIC for driving squibs (small explosives often used in airbags). Also, companies that do these sorts of chips might very well have a chip in their library, probably not a "standard" advertised part, that might be perfect for other companies doing similar sorts of products. That's arguably off the shelf since there's no (or perhaps very little) development work required to get it.
Man, it is my honour to be able to help you. If you like the channel, I am happy - and yes, if you would recommend my Insta and my RU-vid to your students, I would be even more honoured.
You should be able to explain to your students when it is appropriate to use a semi-custom ASIC, a full custom device or an FPGA, with the pros and cons of each, both from a technical perspective but also from a cost perspective. Chord Mojo Audio DAC is one commercially available device which uses an FPGA.
In the first Gulf war, there were a lot of precision weapons "misses" that I don't think were actually misses at all. I think ECM were deployed and successfully made the original target impossible or unlikely to be hit so the guidance system picked the ECM transmission as an alternate target. So when you can't seek your target because of jamming, you can still find one legitimate military target - the jammer!
Thank you so much for talking back! Yes, this is entirely possible - like with early night vision equipment for rifles, the knife cuts in both ways in many cases...
Michel misspoke. The first version of Javelin guidance computer was designed by Texas Instruments in 1989. The boards we saw use Texas Instruments Digital Signal processors and many ASICs (Application Specific Integrated Circuits) made by VLSI Technology. VLSI technology was a famous provider of application-specific integrated circuit designed to customer requirements. That is what the chips in Michel's video were. FPGAs are Field Programmable Gate Arrays. At the time Javelin was designed, FPGAs were a relatively new technology, with Xilinx 2000 series released in 1985, and 3000 series just released in the late 1980s. The second vendor of FPGAs, Altera, was still on the EP 300 series. None of these chips are found in the Javelin computer that Michael showed off.
it's also much older looking than anything I had seen elsewhere, I honestly had mistaken it for an Argo D-4 Javelin sounding rocket computer. needles to say, it may have been a proof of concept prototype or very early on demo unit. the PCBs in the 90's was much smaller than that for sure, and that was over 20 years ago.
Sorry but this is wrong in a lot of places. I was a senior design engineer working on the electronics and test for a system a while back. Firstly FPGA's did not really have many gates in them except some D types for input/outputs etc (and the associated line drivers from LVDS to LVTTL etc) .. Most of th rest has traditionally been done with small RAM array look up tables. Specifically you can use a lot up table to simulate any kind of gate or if it is big enough a small group of gates and a large group of them are connected on a series of internal busses.. They only started getting embedded cores and DSP slices in about 2000. The real reason FPGAsare used is flexibility. IE once your processing core is validated a software or firmware change is not a big job compared to changing ASIC. This happens more often than you would think as some missiles have seeker changes fairly regularly, and sometimes change type of seeker. EG the change from Lead Sulphide and upgrades to it, to photodiodes. That would require a change of ASIC but just a firmware change on an FPGA. At one point missile tech was changing every few months. There are over 20 types of IR/Visible seeker about 15 of which are for IR alone. SARH and Active radar there is probably double that.
Generally where possible it is always better to use FPGAs primarily because it allows you to effectively update the hardware in the field, something which is extremely important to keep up with countermeasures. I think the only cases where ASICs should be used is where an FPGA cannot provide the required performance as FPGAs are quite limited in terms of clock speed and also density compared to ASICs. The volatility is also a great and important aspect that had not occurred to me as is also the fact that making an ASIC would require disclosure of the design to a rather wide audience making it far more difficult to keep top secret.
Very nice video! This has given me some new perspectives for my thesis. The use of FPGAs as a way to reduce the risk of reverse engineering. Thank you for making this!
I think everyone is ignoring the main benefit of FPGA, specifically the first word, they are field programmable, which means they can be updated if a bug is found in terms of the logic. You don't end up with a bunch of useless missiles if it can be fixed in firmware, stocks sent to depot, put on the test harness and updated.
Not only is this the greatest video I myself have ever seen.... It is almost certainly the GREATEST video in the history of mankind! It has been an honor and a privilege having watched it! Thank you! 👍
Saying that an FPGA has chip dysphoria is as hilarious as it is accurate! Bravo sir! 😂 Personally, I like to think of it as Lego for digital design engineers, but I'm going to start using this turn of phrase.
Hi, sorry for being slow in responding to you, I was so overworked. Your praise means the world to me, thank you my friend. Please feel free to subscribe and hang out!
So the idea is if someone stole a Javelin or came into possesion of one, because of the use of FPGAs instead of ASICs they wont figure out the operation of the system, making it hard to reverse engineer. Wow thats brilliant and thank you for the video
Using a public toilet as a target😅 i loved the explanation and your accent so i decided to subcribe and thumbs up. Keep them coming very interesting and informative.
Thank you so much my friend. I try to keep the things funny, so that it does not get boring. Please stay tuned for more, as it comes! And never hesitate to reach out with feedback, whether positive or negative.
Keep in mind much of this can be done with volatile memory and a MPU (not as much MCU) but it would be much harder to get the signal processing power needed. Each sensor can have its communication protocol specifically designed for its data output and refresh rate. One may have 7 bits of precision at 40khz, no problem, the next might need 12 bits at 20hz, no problem. Trying to enforce something like 8 bit SPI or I2C between a large number of inputs with drastically different requirements would be a nightmare. ASICs for everything would also be a dumb. They would be insanely expensive and could have a mistake that could not be corrected without a new run. Upgrades would be impossible. FPGAs could be programmed in the field as their name suggests. My guess is that if you look deep enough you will find MCUs, MPUs, ASICs, and FPGAs but the bulk of the lifting done with FPGAs.
Very interesting, I hadn't thought about the possibility of having the guidance logic be volatile. I was going to simply point out that in addition to the cost of creating an ASIC, it's also an extraordinarily time consuming process that is basically superfluous if FPGAs give acceptable performance, especially considering the FPGA's perk of allowing for much more rapid iteration
This is not right. You have failed to consider the target unit price of each chip in your analysis. For some customers this is critically important. Suggest you talk to Sony.
You don't need to do rapid iteration with ASICs. Few of my customers ever screwed up. They got it right first time. Why? Because the non recurring engineering charge was so high they put the effort in doing their logic simulations in sufficient thoroughness that they didn't make a mistake in the design. I don't recall a single design I was involved in which required a design change and refabrication of the device. We did have one customer that asked for the input protection diodes to be removed to increase the performance of the I/O buffer which then resulted in an ESD problem later..ouch!
@@deang5622 I don't doubt that these are both true in the right context but neither really apply to my industry. We ship low volume units to a wealthy customer (the US Govt) so unit price is high anyways and our team is too small to put in the work required to nail an ASIC run on the first try in any reasonable timeframe. I agree that for a company like Sony the calculus is going to be completely different, so point taken.
There are two issues here: 1) Small production runs don't justify the cost of an ASIC. So, use an FPGA. This is the purely economic justification. 2) Security of the design. If you use the correct type of FPGA (one that configures on boot every time) then you can erase the design by obliterating the configuration memory in case of capture. The first issue is shared by the commercial world - small runs => FPGA, large runs => ASIC, REALLY large runs => Custom part. The second issue is unique to the defense industry. There are some secure systems that save their configuration in RAM. If the system detects tampering or capture, they simply wipe and then power down the RAM. This very well obfuscates the design and all its secrets. @MrTamhan - Don't let those commenting on your pronunciation annoy you - they likely only speak one language and you have at least two languages under your command. Bravo!
1. ASICS are not economic on the mediocre scale of production. 2. ASICS can't be upgraded. 3. ASICS have to be outsourced and therefore are subject to unwanted inspection. 4. FPGAs can be programmed in a volatile way. This makes it harder to analyze them. 5. The programming of FPGAs can be upgraded on demand. 6. Calibration may require flexibility anyway. 7. Different usage/mounting scenarios may require different programming. 8. No issues with possible flash memory programming degradation over time. 9. No issues with possible flash memory errors due to some presence of radiation.
I really enjoyed this video. Keep up the great technical content creation! I’m from the US, and had no trouble understanding your accent (please disregard folks who are less encouraging). 🎉
Hi Man, thank you so much for talking back, and sorry for being slow in responding. It is my honour - please stay tuned. I do not only do defense stuff, but also a lot of general engineering. This, however, also applies to defense!
Thank you for the very informative, educational video. Your pronunciations of javelin and sidewinder are unique and took a moment for me to translate in my head, but they're unimportant other than making us smile at hearing something different. What's important is that you are extremely good at communicating your message, and I thoroughly enjoyed watching. Look forward to more videos!
The whole ECM bit doesn’t really apply to the Javelin. It is not a radar guided weapon, but an infrared homing one. Once the launcher has picked a target, the missile’s seeker is constantly slaved to the target, and it’ll execute its flight profile. ECMs have no effect on Infrared Homing (contrast) seekers, the only kind of countermeasures that may work are obfuscation (smokescreen), or dummy targets (flares), and sometimes dazzling (IR Jamming) though I do find it unlikely to really work on the Javelin.
LOL, I was trying to understand what a "SEEDA VINDA" was, until I realised he is saying SIDE WINDER... The FPGAs are chosen over ASICs for a variety of reasons including dynamic updates in the field, dynamic logic, security, among others. Agree with your analysis
This is the first time I subscribe to a channel based on a first watch. Do not apologize for your charming accent. I like your style. It's only because I'm an old man and my first atlas was even older than me that I understood what a "Formosan pilot" meant 🙂Thanks!
This could be a 30-second video. The answer is obvious and simple and doesn't just apply to the military. FPGAs are used because the production volume is too small to justify designing and verifying a custom ASIC, and also because it's basically impossible to get a custom ASIC manufactured without leaking secret information.
ASIC mask charges (NRE) have increased exponentially as die geometry has shrunk, and leadtime sucks balls - often years to do a couple spins, and by that time, the project needs have probably shifted. To counter this, people often load microcode data into the ASIC at boot time so that they have some flexibility after tape out, which can be less secure than the FPGA approach which has a highly refined security model.
You don't need an FPGA for such "IP theft" protection. One could just upload the software/firmware into some volatile memory (DRAM) to the missile from the launcher when it is armed/powered on. The result would be identical to what you suggest here. Here FPGAs are probably used because of their performance for very specific tasks. CPU are very general purpose, can do anything but least performant, FPGAs = can be specialized and can have better performance than CPUs at the expense of more power consumption. ASIC chips = maximum performance but zero customization. These in theory could be reverse engineered from wreckage, so not suitable for IP theft sensitive applications.
Yes. The missile was old asf and considering it was built in the 90s lmfao. No shit it had to use FPGA's lol. Im more impressed that the missile somehow used 90s era CV. No AI needed. Somehow it was just that reliable.
Not quite. FPGAs have an advantage over normal general purpose microprocessors. You can do a lot of work in hardware in parallel. But I agree with you that software could also be protected by loading it onto volatile memory.
We use FPGA's in our radars because (1) we want to make it harder for the ChiComs to copy the design plus (2) we like to be able to fix "hardware" problems with software updates plus (3) we don't want anyone in the supply chain to be able to operate the unit before we load code onto it plus (4) in the event of capture it will zeroize itself and stop working. We also do part of our machine learning pipeline in the FPGA's.
I never even heard of FPGAs or looked deeply into the engineering of weapon systems, but the youtube-algorithm is all-knowing lol. Good to know that technology has overcome das Siedewinnders problem XD
Hi Man, sorry for being slow in responding and for my weird accent. It is my pleasure that you like my channel! Let me know if there are any topics which interest you!
This was informative, rockets, missiles and defense technology can be very interesting. You're also a great presenter, your unique pronunciations made it even more fun, and you speak very clearly and to-the-point. I may take inspiration for future systems I design. Thank you.
This is definitely also true. Thanks for talking back. The whole FPGA topic is a bit difficult, I really need to make more videos on it shortly! Thanks again for talking back!
The same could have been done with a CPU based system. Its just FPGAs are fast for video processing in real time. Also if you need permission from a server to fire, if that server is jammed or networks are not in range, the darn thing won't fire exactly at the point it is needed most -- which is a huge danger. Not good design. A better idea would be time bound erasure unless the right password is keyed in.
Couldn't you just make a CPU with the design architecture of the FPGA design that you made that is good at video processing? Isn't it just more of a cheaper way to get prototypes which is why you see them in limited run products such as cars when they aren't benefiting from economies of scale with mass production so they save money just using FPGAs.
@@VRNC-kn5tf Perhaps they are doing some high speed analysis of the video. Who knows. There are a million ways to make things more complicated than they need to be.
maybe if you had programmable IO pins for all the pins, maybe. thing is, with an FPGA, a pin can be anything, so just drawing out the schematic of the PCB tell you nothing without knowing the programed circuit inside the FPGA. ASICs all have dedicated pins for analog inputs analog outputs and digital only pins, and they can look at the glass to see what it does internally (unlike a FPGA). also, there may be the parallel compute angle that a ASIC just can't do with the one step of a program at a time programing. one is great for timers in microwaves or mp3 players, the other for real-time parallel data manipulation (digital oscilloscopes for example). can a ASIC be a Graphics processor, sure, like the S3 ViRGE, to do it proper you need more than that. it wasn't called the "3D decelerator" for no reason at all, lol.
When he says "server", he means the actual launcher itself. Its not actuall hooking up to the cloud. Some ground based SAMs might actually hookup to a server though. Just not one through the internet since infrastructure is always first to go down in a war.
@@MrTamhan LOL. Great! I actually transcripted a ballistic algorithm written in COBOL for a video game. I start to think every guidance system is using this ancient language.
FPGA are used in low volume applications where money is not an issue. in automotive or consumer, the volume are high and cost must be low, so any fpga will turn into asic.
The principle reasons are speed and reprogrammability. Speed in that complex operations happen at the speed with which a signal propagates itself through the appropriate maze of gates to deliver an output - this rather than a series of memory fetches, operations, storing and shuffling around though the cpu. For a limited single purpose application it is much faster. Secondly the program is flashed (for lack of any other term) onto the gate array this it is nonvolatile and immediately accessible when needed. If the program requires an update it can be reprogrammed relatively easily. We used Xilinx chips extensively in automation applications for just these reasons.
There is an outher reason, CPU may contain fearures you dont use, with FPGA you can craft "cpu" todo your specific function way more faster. Also if counter measure is found you can upgrade software to bypass it. Just by software you can replace hardware logic.
You can also use an FPGA as a processor, itself. And not in the way you may think. Yes, the densest FPGAs could fit a whole processor "macro" on one for decades. But you can also program the actual algorithms straight into the logic, as finite state machines. Such an algorithm can operate much faster. Instead of running several serial commands, to run the routine, as in a typical processor, on a state machine, it ALL executes in one clock cycle. Then there's dynamic reprogrammability of the device. In particular RAM based FPGAs, that need to be reprogrammed every time they are powered up. Here, and FPGA can be reprogrammed to a different algorithm on the fly.
I had to clean up my ears, which was clogged with blood, after hearing this clear and genuine English pronunciation. The only thing, which is still a mystery: is javelinUS has something to do with anus…
The Javelin is a 1980s design and FPGA was the best technology available. Nowadays even the mid-end off the shelf smartphone SOC will do the job. Nowadays there are better and cheaper IR sensors, cheaper smaller and much more precise gyroscopes and oh, AI chips inbuilt for image recognition for targeting ( think of how a tank looks like from different angles). So nowadays it is possible to do these missile development the smartphone way, i.e build the system and apply software upgrades as testing evolve and/or battlefield tactics evolve.
Hi, thank you so much for talking back! There in fact has been something similar done in the past, the suicide batterys on Arcade boards. One day, I must make a video on it...
(Im not an expert) Why would someone wants to painstakingly replicate the exact algorithm of an anti tank weapon that came out in 1996? At that point, most of the nations would probably knew whats inside a guided weapon for most of the time. If they somehow download the bit array, how would they make sense of it? and how would they make a new asic hardware that should work exactly like the captuered one? its far easier to make a new entire missile based one the captured missile and that does'nt need the exact guidence algorithm, they only need the knowledge of physical, mechanical and the sensor layout of the capured missile, which will make the entire fpga pointless. and how would you counter a passive homing missile by knowing its guidense system?
I think it's more like a combination of the 2 reasons, ie. yes having crucial design details embodied in an FPGA has exactly that benefit where you take the lid off and it loses it's memory, but there are also instances where the technology you want to implement demands an ASIC solution but the build quantity isn't sufficient to support the costs in developing one. Yes they have a lot of dough to sink into the development of these things, but if the thing they're implementing is not that top secret just do it in an FPGA anyway and pocket the difference. Might I say with the best of intentions in mind that I adore your accent and style in presenting your topics, and appreciate the minefield that English must represent for speakers of all the phonetic languages out there.
FPGAs are fast and powerful for this type of time-critical data processing and control application than a general-purpose CPU system, and much cheaper to develop than custom ASICS for the same task. There is of course a weapons proliferation issue, back in the 70s and 80s and into the 90s the US had a huge lead in the development of various ASIC based weapons systems. These days those systems can be replicated using off-the-shelf parts using FPGAs, and the number of FPGAs turning up in destroyed Russian equipment in Ukraine is telling. For the US defense industry, an FPGA now is simply a cheaper option than a custom ASIC for many applications that needed ASICS in the past. The big advantage for Western equipment nowadays is the more refined designs and performance of various networking systems, and the performance of things like the GPS constellation vs other systems like Glonass.
As weapons obviously have long-term lifecycle, upgradeability requirement is presumed. FPGA is much easier to be reprogrammed than ASIC to be exchanged and safely destructed as a secret device.
