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Cascade Current Mirror - Analog Circuit Design Interview 

VLSI Organization
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In this video we will look at one of the interview questions asked for "Analog Circuit Design " role in a MNC

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2 окт 2024

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Комментарии : 13   
@Himanshutiwari590
@Himanshutiwari590 27 дней назад
Good explanation
@saidulu97
@saidulu97 2 года назад
the explanation is misleading in a different way. not the exact answer
@janentket
@janentket 28 дней назад
It think so!
@vlsiorg
@vlsiorg 3 года назад
@ 4.56 --> The MOS goes into Linear ( I have recorded as saturation though 😃 ) Make a note please
@Ayushchauhan-wi5pl
@Ayushchauhan-wi5pl 10 месяцев назад
Can we say when both mos are in saturation intially, (Ids vs Vds) curve for both Mos overlap ??
@somendas7711
@somendas7711 2 года назад
great explanation. Thanks a lot.
@vlsiorg
@vlsiorg Год назад
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@vlsiorg
@vlsiorg 3 года назад
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@黄少天-m4n
@黄少天-m4n 2 года назад
😃M2 was the cascode device, which acts as a sheild. The voltage of M2 source change very little when its darin changes.( all in saturation)
@filipfabri4998
@filipfabri4998 10 месяцев назад
thanks for the answer, you are an absolute chad 👑
@arnabdeb3517
@arnabdeb3517 Месяц назад
Yes it's correct that the cascode transistor shields the CS transistor....but if Vx falls below Vb-Vth then M2 would go into linear first followed by the transistor below
@nikhilshahvuppala9081
@nikhilshahvuppala9081 3 года назад
This problem and explanation are good.. Thank you very much ..
@vlsiorg
@vlsiorg 3 года назад
Happy to know this was helpful. Happy learning 😃