Thanks so much for this. This is an incredibly useful companion to the nand2tetris course. I wouldn't have been able to figure this stuff out without this vid.
Hi! I'm coming from the Coursera course. I was having a horrible amount of trouble trying to figure out the solution to those gates. I finished all of them but the last 3. Then I watched your video. This helps LOTS to understand how to figure out the way those chips can be set and the reasoning behind. I actually feel that the Coursera course needs more content, and this video would definitely feel part of that gap. Thanks a ton! :)
Dude you rock. This is a fantastic companion video to nand2tetris. Even the suggestion to use hneemann/Digital has made this whole activity of chip design much more manageable on my side. Thanks
question on that 8 way demux: i figure the diagram would look practically identical to the 4waydemux you built, but how do you handle that extra sel bit? is the splitter capable of having one wire carrying 1 bit and the other carying 2 bits? do you put another input, declare it sel, have it run 2 bits on the line, and split the wire with one 1-4demux on a not gate? another question: how on the 4-way-16bit mux did you determine where to use the msb and lsb? i tried translating how you prescribed the msb/lsb in the 4waydemux problem, but got a little lost. thanks for the video, great stuff.
Without looking at the diagram to answer your question, if you need to choose between 8 values, you need 3 binary bits. So yes, you'd potentially have three layers of logic.
There are two ways: reading the documentation carefully so you know which line is the MSB, or what I actually do, which is get it wrong the first time, try it the other way, and then remember in the future :-D
This definitely help me get a better visual building representation of each of the elementary logic gates along with specifying the implementation of the gates in HDL. For reference to using this software in the future for designs. What is the name of the software used in this video?
If possible can somebody please help me I’m having a lot of trouble. When I try to run my or, xor, and mux hdl files I get a blank screen. I’ve tried to rename the files to make sure I’m in the right location but nothing is working. If anybody knows how to fix this I would really appreciate the help.
Tea Leaves: You should check out the properties (right-click) of the splitters that you are using in this video. Once of the "recent" changes to Digital includes the "spacing" on the I/O lines of the splitters to make arranging the circuits a little easier. Also, I assume you are using the splitters to illustrate the multiple "lines" that a 16 bit gate would have, but, just for completeness sake, and for the sake of your viewers, you do know that the gates themselves (AND, OR, etc) can be multi-bit, right? For example, one 16 bit wide input, one 16 bit wide output, and one 16 bit wide NOT gate. Another interesting feature is modifying the number of inputs on a gate. For example, place a basic AND gate, then while mousing over the gate in Digital, press the "+" or "-" on the numeric keypad, and it will increase or decrease the number of input for that gate. This helps a lot when you need, for example, a 3 or 4 input gate, to avoid having to use multiple gates. And while there are not, commercially available, chips that implement ANY number of inputs, there are some commercial chips that implement 3 and 4 input gates, so you can more closely replicate, in Digital, a circuit that could actually be built on a breadboard if someone wanted to do that. Keep the videos coming! Tony
Great resource. For XOR, I found it easier to use this 'eqn': XOR (x, y) = Or(And(x, Not(y)), And(Not(x), y)) .... In simpler terms: XOR (x, y) = xy' + x'y
I'm still having the hardest time constructing these gates on my own for some reason, I feel like i have a good understanding of how each gates work but can't construct unfortunately. Any advice?
Your course was very helpful to me, and I have one doubt, kindly clarify. Why And cannot be used to implement And gate? Why are we using Nand and Not gate to write HDL program to implement And gate?
If you already have an AND gate, you don't need to implement one; the notional point of the class is to take the simplest possible gate and implement all the basic logic gates. NAND and NOR are the smallest gates which allow one to implement all of the rest using nothing else.
A most excellent video that has provided much needed guidance. I can not thank you enough. For me, it is a much needed supplement to the course material.
I'm so glad that you found it helpful! That's what it's all about for me. If you'd like to help the channel, please feel free to like, subscribe, and tell your friends!
I love the fact you are teaching real-world circuit specification HDL, but after watching the Nand Game series, my question is, isn't there some kind of tool that will let you draw circuits graphically, and then convert the schematic diagram into HDL?
Yes, great question! Not only do such tools exist, but you don’t even have to draw them - you can literally just feed a truth table to a tool such as Digital or Logisim, and it will generate the schematic or HDL for you. (Typically, the HDL will be a well-known one such as Verizon or VHDL - this class uses a sort of very bespoke toy HDL that I don’t believe any of the major tools speak.) That said, the point of drawing them (or writing the HDL) yourself isn’t because that’s valuable in and of itself, but because it provides a handle with which to think about how these things work at a low level.
The tool Tea Leaves is using for the graphical representation of the circuits, Digital, does support exporting the circuit to (I think) two different "flavors" of HDL.
So we implement elementary gates like AND, OR, NOT etc. using the NAND gate. But how is the NAND gate implemented itself? In the Nand.hdl it says "BUILTIN Nand".
Right - for purposes of this class, the NAND gate is give to you as an already existing part. This isn't technically required - one could also implement all the gates (including NAND) with NOR gates.
Fantastic question. Everyone is different, but I find that laying out the circuits visually really helped me develop that intuition - just seeing the wires light up explains a lot. Other people prefer to take a more analytical approach, using techniques such as Karnaugh maps.
What is the name of the software that you use to design the circuits. It is called digital, right? I tried looking for it online and i could not find it
Yes. Sadly the name makes it almost unsearchable. Try looking for "hneemann digital or go here: github.com/hneemann/Digital. I cover this in the Setup video for the class.
This is definitely common - it always seems easy in hindsight! When I feel lost, what I try to do is divide the task into smaller and smaller parts until they're each individually simple. Sometimes this leads to an easier implementation (which is probably not the optimal one, but is at least functional). Once you have a functional solution, you can worry about improving efficiency.
Any tips to someone who is struggling doing this? I've managed to make the NOT, AND, OR and XOR gates so far, but MUX is being a pain, and I want to be able to figure this out by myself so I didn't watchted the part of your video that shows the MUX answer. I know a bit of propositional logic and as MUX has 3 inputs it means that we can make up to 256 boolean functions (2^(2^n)). Finding OR and XOR was easy because 2 inputs means 16 boolean functions so by brute forcing I've found the answer. But man, I'm stuck for hours trying to figure out MUX.
My tip would be to actuall write out the truth table for MUX and look for patterns. Doing that should let you identify a reasonable place to “branch” your circuit and break down the remaining parts into smaller parts.
@@TeaLeavesProgramming I got it after installing Digital, which allowed me to have more intuition on how arrange the gates. I guess I was just overthinking alot. Now all the exercices on chapter 01 are done, heading to chapter 02. Thank you for the help.
36:03 - it's slightly less horrible with control-A in vim, and/or with various magic in emacs. But it's still kind of a pain. In bash or zsh, though, one can do something like this: for a in {0..15}; do echo " Not(in=in[$a], out=out[$a]);"; done And then just copy/paste that in. (perhaps with :.! in vim)
I'm surprised there's no looping construct in this HDL language. In industry variants are there? Thanks for the video, it is honestly good enough to be in the course itself.
Thanks for your kind words! Yes, different HDLs have different features, but fundamentally they lean towards being declarative rather than iterative because in the end the product of the language is not a process, but a chip layout.
how did you figure out the logic for the 4way and 8way muxes? like I get the logic from using ands ors and nots but why pass the least significant bit into the mux16 gate? if the lsb is 0 then in the case of a and b, a will always be selected and b will be eliminated from the output, even if the most significant bit is 1 in which case the correct answer is b.
The main way I got there was by analogizing the logic for the demux, which worked similarly. But on a more fundamental level, the answer is "look at the truth table" - if you look at the pattern of the selector bits, it's clear that you are going to be building some sort of two-tiered structure, where one tier handles the 'outer' layer, and the other layer needs to be replicated twice for the 'inner' layer. My suspicion (which I haven't validated, so take it with a grain of salt) is that you could probably build these circuits doing either LSB or MSB first, as long as you were careful about which inputs (or outputs) you wired to which final gates.
By the way: You can use Verilog in Digital when you install "icarus verilog". Just use the External Component. The HDL used by Nand2Tetris is almost verilog. Just minor differences. :-D
Thank you! I'm sure this will help anyone who wants to use Digital for their own projects. (They REALLY need to change the name to something more searchable though.)
Hi there, is there a way to write a for loop in this modified HDL language so as to not copy paste all the bit lines? I tried the 'standard' way by setting up an index variable and incrementing it with every iteration but the Hardware Simulator would not even let me load the chip. Thanks in advance for this very helpful video
The HDL used in this class is not really an imperative programming language in that way. Some HDLs (e.g. Verilog or VHDL) might offer facilities similar to this, though.
Hi, Michael! In Visual Studio Code I'm using the extension "Nand2Tetris Tools", available at marketplace.visualstudio.com/items?itemName=leafvmaple.nand2tetris. I don't know if this works in 'normal' Visual Studio as opposed to VSC, but do let us know!
Hello, Mohammad! Helmut Neeman's "Digital" is available at github.com/hneemann/Digital. This is discussed in our "Setup" video which you'll find on the NAND To Tetris playlist. Good luck!
Using a technique called a Karnaugh map, you can simplify the truth table of any circuit into an expression; a Mux, simplified, reduces to (NOT selector AND input 0) OR (selector AND input 1). From that the fact that you will need two ANDs falls out. Even without a Karnaugh map, it's pretty straightforward to figure out the expression from just looking at the truth table and seeing the patterns - which is what I did.
I don't know why my code doesn't work: CHIP And { IN a, b; OUT out; PARTS: // Put your code here: Nand(a=a, b=b, out=o1); Not(in=o1, out=out); } it says comparison failure at line 5. a=1, b=1, out=0; this is weird.
BTW, this is really good video, better than the course tutorial already. Students really do need to learn the basic logics first, then how to draw diagrams, and finally dive into the project. Don't waste time reading books and watching coursera videos, just get your hands dirty.
SPANISH: ¿Cómo se le llama a cuando representa el código de manera grafica? Con formas y conexiones, por ejemplo en los dibujos que aparecen en el Software Digital en el Minuto 15:43 GRACIAS!!!!
Ok thanks , the video was very helpfully. Can you please explain how are you convert all the Hdl files to the program, or make a short video I think it will be very helpful to me and to other people that watching your content.
Hi! A NOR gate isn't part of the NAND To Tetris class, but you can definitely make one out of the other primitive gates we've defined here. I'd start by creating a truth table of what NOR represents, and go from there.
I think it depends on what you do with it. If you're literally typing in what I'm typing for the class, then I'd call that cheating, and worse, you're selling yourself short. Ideally, you would do the exercises by yourself...and then watch the video for commentary.
What I'm trying to do is show how I think through the problem; I assume anyone taking the class is using the book and lectures as their primary source. But I accept your criticism. Thank you!
I don't know if you or anyone else noticed this but at 27:59 where after you fixed your mistake in Mux.hdl and you're about to test the changes, you actually load in Mux16.hdl, then you load Mux.tst to test against Mux16 but you haven't implemented that. How are the tests passing? Or did some editing magic happen there haha! Definitely editing magic! While I was watching I yelled at my monitor "That's the wrong file that'll never work!" 2 seconds later... it worked... hah.
@@TeaLeavesProgramming In the tests the first thing it does is also load the .hdl so you can actually skip loading the chip entirely. Probably a little late to be helpful but hey, next time! =P
