Google's Open Source Hardware Dreams 

Hi, how much did it take from you to learn VLSI? did you start learning from zero or you were in EE/CE college?

Better start learning and tinkering now while we're still in the early days! :) I'll be trying.........

funny you mention Microsoft's early fear of Linux. Now they're a significant player in that space, with Windows Subsystem for Linux feature in Win10/11 allowing Linux distros to run inside windows

I think this is totally possible. True, the cost of making a small number of chips is going to be really expensive, but if there's enough people that want in, and the cost of small runs comes down a bit, this seems within reach in the next few years. The open source community has the design talent.

The Risk-V CPU is already open source, but good luck finding any manufacturers / operating systems. The truth is that without mass adoption, it will never be a thing.

@@firstNamelastName-ho6lv Yeah simulation may be nice and a broad knowledge in the society how to build chips is (as all education) something good, but producing a REAL product goes always hand in hand with a RISC[1], sorry for the pun, a risk. Reminds of all those people who want to be a "superstar". Yeah, they are real ... but not enough "free slots" that let you become one. You know what I mean? It isn't even the worst strategy: Instead of paying decent wages or to take care of all the tedious education of your future employees, why not make them believe they ALL can get to be a superstar and then pick the best and throw the others in the trash. So THAT reminds me of something;) Hehehe. BTW of course the provision of free development opportunities and access to research for even laypersons is never wrong. However, giving someone false hope (like any hype) is antisocial and despicable. At least a very expensive hobby ... but in my opinion more useful than botching sports cars or shooting automobiles into orbit.:) [1] Did you actually wrote "Risk-V CPU" up there (it is RISC-V!)? I noticed it only after writing down my joke. Or did you inspire me? Anyway: Hehehe, well done!:)

Disappointed you didn't provide a diagram...

Thanks for your great work, Matthew.

How about doing lucky imaging in real time? Would that be possible/interesting?

@@alanparker3130 That's definitely something I've read about them trying, but the issue is it only works with very short exposure times, which doesn't work for dim objects. Plus if 1 in 10 frames is actually OK, then 90% of the time observing was fruitless. Also, when telescopes get really big, different parts of the image are under different patches of warm or cool air, so the image isn't uniformly distorted. So that means you have to de-warp some parts of the image but not others, which is possible but it adds steps to data processing. So I think there's enough reason to go with adaptive optics that that's the main solution they go for.

This might well offer you the chance to shift a well designed FPGA implementation into a dedicated IC. But why would you? It's a slow process node, and once you have made your chip, that's it. Warts and all, all design errors baked in for free and for ever. See that 'RTL' bit in the diagram? Register Transfer level - that's your hardware description - exactly what's needed for an FPGA. I can see that for a dedicated, simple task, where the consequences of error are low, it's cool. But if you can write HDL first pass with no hidden errors, then there's an entire industry wants your number. The principal reason those 'professional' EDA tools are so expensive is because they are intended to prevent or trap (or at least make sure you find) those hidden bombs. I expect most of you are programmers, and know that states are 1 or 0? In an HDL, you typically have 9 states, and you need to be sure what happens if your signal is in any one of them - because hardware - one day, it will.. I feel a bit like the guy asking what use is a computer? It's definitely a cool idea. And don't get me wrong - I'm going to have a play once time permits - but as an FPGA dev, I don't quite see what it offers you besides being cool. Sure, the big FPGAs are viciously expensive, and the tools are 'interesting' to acquire (although for the home user, they are free, so..) and a pig to learn, but I don't see this being any easier, and there are cheap FPGA boards out there now..

@@timwatson682 What do you mean by "9 states"? I’ve done ASIC design for years. There is 0 and 1. The difficulty of an error free high performance design is that there is an extreme amount of parallelism and pipelining that make verification of rare corner cases hard to enumerate and/or encounter.

I definitely remember hearing about this from one of my astronomy professors. Hopefully this will become reality in the near future

If they did not pay them so poorly, maybe they would have more. We have normal tradesmen earning more than the average chio designer wage.

I do it for fun on paper 🤡

I thought about that. I figured even if Google pulled the plug, the tools and the code repos will still be around.

Google's open source project tend to last longer and if Google suddenly were to kill it, someone gonna get the torch

As the others have said, open source is a bit harder to kill by dropping the project than their in-house apps and systems which require massive server farms.

Lol it's literally text files on git.. how do they discontinue it

@@Asianometry Also, Google likes to kill small, niche user-facing projects that have limited long-term strategic value. When it comes to things designed to change the entire ecosystem (e.g. make their AI accelerators cheaper in this case), then I think they tend to commit a bit more. Their culture encourages tinkering, so obviously you see a lot more stuff that fails, but I don't think this one is necessarily in that category. BTW, any chance of putting the links referenced in the video into the description, so they're more accessible?

I'm actually interested in that.

I'm working on something similar. But, copyright goes for much longer.

The Mythic chip is (was) amazing technology, a white paper describing its design was on the website, multi-level-cell memory . We had just recieved a dev board when we heard they ceased trading.

How much great technology never reaches the market because of funding issues. Then you hear about the hundreds of $million spent of shitty things like NFT's etc and want to cry. Imagine the technological progress we could have if more people valued science and technology.

That would be cool indeed. I suspect it's still incredibly complex and expensive and I wouldn't be surprised if there's minimum quantities and so on, but it's a step in the right direction.

2122 Eh, I feel like unless you had those before, or had proof it would work, it probably wouldn't glow up your career _that_ much.

That would be interesting for sure.

EZ, implement a minimalist kernel that scans the hardware and recompiles another kernel for actual use. This way the running system remains lean.

It's a common problem for all of humanity. So many things should be limited to what a single person can completely remember and understand, one actual human being & an understudy. It's arbitrary, but it forces you to get rid of what you don't need & keep things manageable. How can you expect someone to know & follow the law when there isn't one person on earth who can understand or remember it all?

sahhaf1234 Longer lifespan? How much longer do you plan on living?

@@902384902384 but hard problems require hard solutions Don't get me wrong, i too am a fan of elegant minimalist solutions to complex problems - but sadly that's not how real world works

if you think linux is bloated imagine how bloated windows is.

I don't even know what I had to sign. If I refused, I would lose my job.

@ similar, sign or drop the class for us

FPGAs can do about anything a custom designed chip would do otherwise. Open hardware is more about that Nvidia crap, where people can't write and update drivers for their operating system (Linux, BSD....)

Starting an asic run is millions per attempt. And it will take more than one attempt.

@@hinz1 no. Even with the video's example - you can't program a FPGA to work across variable voltages, only high and low (1 and 0), so it would be categorically impossible to build 06:28 design on it. That is exactly the point. Also, for researchers to be able to share their papers with no NDAs is huge - most cutting edge research on this field is conducted behind closed doors, even if for tests and trials they build mock-ups with FPGAs, the tooling and processes are wrapped in a thousand layers of bureaucracy. Honestly, what I see coming from this initiative is not much beyond what google wants - in like 4 or 5 years there will be a lot of recent graduates who already got their hands dirty, and so are better prepared to be hired. A friend of mine designed a couple of photonic chips for his PhD, and everything took so long, and he had to put in so much effort to fight for the grants necessary.... If something like this makes it 10% faster or 10% cheaper, it is already huge.

@@prgnify hmmmm why not these people share these tools on warez forums , am sure people will reverse engineer and crack them and will be in public domain . sometime piracy is good

@@Xerox482 the issue than become that if you MAKE anything using those proprietary technologies, they are entitled to it. Same reason why open source programmers star as far away from leaked source code as possible, so there can never be any claim of infringement

if you're talking about components, there are plenty of cheap jellybean third-party replacements parts so there is no practical need besides as modules integrated inside a larger die. Though for right to repair, the manufacturer should have that in mind during the PCB design instead of using unusual pinouts/packages or component characteristics.

Finally, I was looking for this comment. Although the previous comment says that rejected parts that are relabeled work "fine" the thing is lifespan. And then there's propietary chips where you won't find details or datasheets... But can be circumvented by knowing what kind of function does. Like a dead Bios chip, or the PLL for clock modulation/generation. Or even remaking Legacy chips, like SID of the C64, or the TTL 74 series with higher freq range, less voltage/current drain, better fan-in/out capacity... Heck even make ALS181 but in true 8-bit form!

@@carlospulido6224 I didn't say "rejected parts that are relabeled work fine". This is your miss-interpretation. Like you said, I just think those little ICs cited by OP are often so simple that they are already retro-engineered, replicated and improved by many manufacturers, including the reputable ones.

Well said. The performance implication is tightly coupled. Open source toolchain is evolving fast but still has a mountain to climb to match the performance of proprietary tools even for legacy processes.

Nodes? What are nodes in this context?

These tools also work for the non open processes, I believe there was at least one succes story around for GlobalFoundries 12nm

Thermal imaging sensors, known as bolometers, are made using different techniques. Maybe Asianometry would like to make a video about this quite complicated and delicate chips? Anyway, as long as you make your thermal imaging device with 9Hz/fps you're good. Higher refresh rates are a bit more ...restricted, so to speak, at least in USA and such.

@@aeonikus1 so you need a different node/process to manufacture these sensors?

@@ballinlikebill8334 A completely different process. It's fairly advanced, high aspect ratio MEMS with custom deposition(a-Si or vanadium oxide) for the actual sensor array, plus another, normal CMOS readout chip bonded to it below.

Typically they are not universal unless a particular fab wants to maintain compatibility between individual facilities

@@michaelharrison1093 I see, thank you!

Maybe if you can combine different chips on a wafer, you can cut costs for smaller projects. That's how custom PCBs are cheap to order nowadays. Though I agree that we probably won't see anyone ordering 5 chips for a few dollars anytime soon.

@@SpecialeW for a small scale production run the cost of an entire wafer isn't the problem (especially since old nodes user smaller wafers). The cost for the masks are extremely high and most likely will not get lower since it's a lot of effort to create them. Maybe with maskless lithography one could get a handfull of coustom chips for a couple of thousand bucks, but thats still a lot for an individual.

@@minespeed2009 thanks for the clarification! 👍

Anything computer related is solid but you’ll need good math skills up to differential equations to make it through.

I'm sure you'll do more research, but just a heads up, comp sci is programming, what you want is computer engineering (I think). Also, it's very competitive.

If you want to design chips go electrical engineering. Half of the software engineers I've worked with are EEs but you never see a hardware engineer with a CS degree

The latest processes are always extremely expensive and reserved for the biggest, highest volume customers. 130nm is old enough that it's not so much in demand so they will let ordinary mortals play with it.

No. No it's not...😀

Free it you join the open source program, otherwise you can also pay. All designs make use of a template with about 10mm2 of user space and the closed source shuttle was something like 10k$ for some 100 to 300 chips depending on the run iirc

was looking for this comment :)

if you can fork it, it is.

ARM sells IP. Their IP is proprietary, very expensive($M range to license one core) and has specific clauses about preventing open-source. They don't care.

@@Spirit532 didn't mean care about their ip being open sourced, but about being disrupted from below by armies of low cost open source chip designers.

@@willkydd They don't make chips. And ARM is still extremely rigid in the market.

A degree in electrical engineering or similar is probably the best bet, so try to look for topics that are tought there and learn them on your own.

I find that Matt Venn's Zerotoasic videos provide a good general starting point. He also interviewed a bunch of people working in the field, which are further pointers towards interesting topics.

you will also need some low level programming, even if you create some chip you will need to write some kind of drivers

@@HennerZeller Thanks 🙂👍

@@lbgstzockt8493 I’ll give that a try!