I am one of the software engineers that developed the software for it. I visited ASML EUV factory/cleanroom in Veldhoven a few months ago, there were EXE machines fully built and some other big modules being tested. It is amazing, you keep staring at it and each time you find something different about it. Making 10 nm features in high-volume is allien tech, it is almost half smaller than the current best high-volume process. In general, making features 50% smaller would reflect on 4x speed/performance or more logic, but because it is NA bigger only in one direction, the gain is limited to 2x. For Hyper-NA I think they are going for 4x gain.
the problem of slow progress is EXACTLY because corporations don't want to throw away these machines. it pays for itself in like a week of production of chips and they keep using them for DECADES milking the market instead of actually doing some FAST progress.
not making any progress and using these machines for decades = printing trillions $$$ from sand. just have to slow the progress down to being as slow as possible.
@@rawdez_the gains are a few orders of magnitude lower then that. Keep in mind, there are thousands of process steps to make a wafer useful and millions of dollars a year are spent on keeping these overcomplicated machines running. Go work for a fab and you’ll figure out it’s not all sunshine and roses.
When I applied for my graduation work (MSc, Eindhoven University of Technology), the assignment was to work on this machine. And this was still 1999... 25 years ago...
I was working as a Master student on a EUV prototype "lamp" at the RWTH Aachen, Fraunhofer ILT and a spin-off company those days. Interesting times full of advancements, miss it. I also miss the beautiful old Aachen city and region with all the culture, clubbing, "beer-gardens", great food, and nature for mountain-biking around. Never got such a good work/life balance in any other region I worked ever after. I should have stayed.
In 1999 at best you could get a DUV machine. this is an EUV machine. Twinscans were introduced around the year 2000 so you might have experienced that one...
I was happy that RU-vid recommended me this video. :) Like another commenter, I'm also a software engineer, but working farther away from the actual ASML machine, specifically developing a software platform for executing adjustment processes on the High NA EUV projection optics boxes. It's quite exciting to work on something that even just supports the manufacturing of these cutting edge machines. We had a tour at the Zeiss clean room, seeing both the older POBs and a new High NA EUV one, and this latter POB in itself is already gargantuan. It was an amazing experience. :)
Absolutely. It's literally holding the future in your hands. For ASML, their partners and their suppliers this is an incredible milestone, and this machine will pay Intel back for many years to come.
I would assume ASML also charges for handover and software to run the machine with or smth? Else why only sell it for 350 mil? Why is ASML worth 300+ billion whilst they only make maybe a dozen of these machines a year?
Def right cheap $350ml for such a complicated machine New tech has made things cheaper but creates a pile of throw away rubbish Make manufacturing back in your country
@@fatjohn1408 Company is usually quotting as having a worth related to its public/private stock market capitalization- which is very little to do with their actual assets on hand. Money generally only exchanges hands with investors to the company when stock is sold on the private market, or as IPO, or extra stock selloff
check out Intel Tera herz - 1000GHz 2001 tech. these silicon producing machines should've been thrown into garbage a long time ago. for waaaay more mindblowing tech to replace it. but they make too much money for corporations so alas not going to happen soon.
@@rawdez_ I see a lot of comments from you and they are all a bit crazy. You write like things are very simple and you know everything. Intel is NOT making Billions on an investment of Millions. Intel is barely profitable. As for the terahertz transistor - that's ONE transistor, not a whole chip. A whole chip has billions of transistors... A terahertz CPU will, due to the speed of light, have information changing at one end of the chip while it's being processed at the other end. You can pipeline for this, somewhat, but pipelining is a very limited tool. Also, what about stability and longevity? The teraherts thing you know about is a fringe experiment... And you only hear about the one time it worked, not the hundreds of times it burnt the CPU, burnt the clock, etc...
@@-.369.- its 1000GHz transistors tech intel announced in 2001(apparently by mistake because nobody heard about it since 2001) that was ready for production and supposed to hit the market in 2005. and replace silicon. but didn't. because milking silicon instead is way more profits. btw "15nm" silicon tech also was announced as tested and working in 2001 but released (as 14nm) 13 years later.
Excellent purchase from Entel. This machine is incredible and Intel's progress forced TSM and Samdung to also place orders with ASML so as not to be left behind.
In my previous job, I help spec a desktop for one of these machines at a smaller scale. The machine was 2.5million and I was told go crazy with the cores. That one definitely is extremely HUGE
If you get any invites to more Fabs, (don't care how new or old) go on ALL of those Fab tours. Just keep traveling and visiting. This is where the rubber meets the road, semiconductor fabrication.
Wow you have an amazing curiosity on all of these stuffs at such a young age. I was video gaming at your age without carrying about any of these hardware stuffs.
This EUV chip manufacturing technology is probably the peak of cumalitive human technology? If there printing 10nm lines how come people are releasing 3nm and 5nm & 7nm in marketing theory, chip structures? is that in a different orthoganol direction … ie vertical to the wafer layer itself?
When you hear people talking about process nodes like 7nm, 5nm, 3nm, that's not an actual measurement, it's just a name. Ever since we went 3D, those node names aren't actually related to anything built on silicon.
It honestly both baffles me and restores my faith in humanity when I realize how much cooperation is needed to create and maintain something of this magnitude.
Out of curiosity, how does the licensing work for those pictures taken by CBS? Like are they just released into the public domain or did each journalist/org on the tour get some kind of license? What kind?
@@BGraves Yes, I'm asking how sharing translates into licensing. I suspect they offered some kind of license to publish to those entities as well but is it unlimited, can they sublicense or did they just release it into the public domain?
love these kind of videos i think this device is human kind most advanced piece of tooling we build so far amazing to see it in perspective on how large it is, and as you mention this is not the full device i wonder if you could snap some images on the floor bellow.
A good size comparison would be to a train locomotive. Basically, those things are trains, just they make microchips instead of hauling goods and people.
i used to work in f11, f12 and f22. i worked with D2 people in oregon. crazy that they're a month behinds asml. very smart of them to get their engineer's feet wet as clearly they got out of shape re: euv in general. decisions like that tended to bear fruit. we would literally do the same thing downstream for the high vol mfg sites training from the d2 folks as they did development.
Current metal pitch (from imec) in N5 is 28nm, using 6 metal tracks for FinFET. N2 is expected to be 21nm with 6 tracks, while A10 in 2028 is expected to be 16nm with 5 tracks. Though this is the densest IO transistors, not the leading edge super fast transistors.
I think it's safe to say that the next High-NA machine isn't going to China, unless you're Elon Musk and consider Taiwan as part of China. I think I had already read that ASML is going to work closely with Intel to ensure this gets up and running properly so we can assume there's other money involved. And Intel REALLY needs this because they mucked up EUV. And for those that don't understand this, Intel is making "Intel 7" with DUV lithography. They're making Intel 4 with EUV, but as of yet Intel 4 isn't making anything for desktop. I don't know the answer why. They had a LOT of issues getting to Intel 7 using DUV but that should have been expected since that "7" node is not what DUV lithography was made for. EUV lithography was made for that type of transistor density which is what TSMC does and why TSMC has pulled away from other companies. So, I expect that Intel wants to basically jump past EUV and get to High-NA EUV and put out Intel 3 and 20A ASAP to get back on the level of TSMC. Or, if this video is correct then have ASML help Intel with their EUV lithography so they can put out Intel 3 within the next couple years and I still think they want to get to High-NA for 20A regardless of what they say or their roadmap shows. Intel has had to do a LOT of edits to their roadmaps.
I wonder if Intel was also stuck on EUV, because TSMC had developed a technique of working with it and patented it and Intel didn't want to be stuck with using someone else's patented technology for this...?
I have some questions that I hope someone can answer for me. 1. Why does it require two passes with regular EUV? Is it because the light source is more diluted and can't do the job in one go? Or more like its a bit blurry? 2. From my memory of chemistry at university, 8nm should equate to about 40 pr 50 atoms. How on earth do you prevent or control all kinds of weirdness that result from electron tunneling? 3. Are we basically at the fundamental limit of how small we can go? If so is it just how well the architecture can be improved, and how much can AI improve it, or will it become a case of stacking layers on top of layers, potentially with microstructures that allow more efficient cooling?
For your number one, it might be because of multi-pattering. In short, you can create structure smaller than your wavelength if you multi-pattern onto the silicon. Basically you're multi-exposing your photo resist to create structures you can't make with a single reticle/mask at that wavelength. It's rumored that pattering is how china is somehow managing to keep up with EUV despite not having current euv tools. That might not be what Ian was talking about though.
@@Alex.The.Lionnnnn The best that I can put it is this: Using phase shift masks we are taking advantage of interference in order to etch features that are much smaller than the wavelength allowing for example the etching trench line that is just 8 nanometers wide (your line width) in the silicon. Remember in a positive photoresist such as used in EUV, its the exposed parts that get etched away. The problem is due to the Raleigh criterion you cannot etch your 8 nm wide line closer than 50 nm (your pitch) from each other if you have low-NA (0.33) EUV. Now if you etch your first set of lines, coat it again with photoresist expose another pattern this time offset just enough so that it etches right in the middle between the lines that you previously etched. You now have pitch of 25 nm. You can now pack twice the number of lines in the same space. Repeat the process you now have a pitch of 12.5 nm. In practical terms where you where previously limited to a finFET with a 50 nm wide fins, by using 3 patterns you now have 12.5 nm fins. If you have a higher NA you can have a finer pitch with having to resort to as many patterns and exposures.
you don't immediately use new wavelengths to create your latest chips. New nodes are only used in specific layers, and there can be dozens of layers in a single chip. So today's cutting edge chips are only using EUV for maybe 2-3 layers. The rest are "old" nodes.
TBH I have never doubted the competence of Intel brilliant engineers. I just hope the incompetent management didn't mismanage for too long and it's too late to make the fab business to turn around even though how amazing the engineering team are. We wouldn't want either TSMC or Intel become monopoly player after all.
Numbers are bit inaccurate on the laser itself - there is 4 Resonators that step up the 2 smaller lasers ( baby lasers!) bringing a low power then an additional smaller amplifier to around ~150 watts all the way to an Average output power of ~30kW. The Pulse for the flattening is lower powered - but the Pulse that creates the EUV can be around 20MW per pulse! (think, we are averaging across 50 khz) but still - incredibly powerful - one of the resonators can cut through 2 inches of steel with ease - and CYMER/ASML/TRUMPF said... lets put 4 of them together! Look up TRUMPF EUV for a better understanding of the laser itself!
It's really exciting to see Intel not only being the first to adopt High-NA EUV, but to have ordered the majority of machines ASML is making. Pat Gelsinger really seems like the right person to lead Intel into the future, as he understands that a leading edge fab needs to lead, as then their own chips end up great and competition will want to pay them for fab capacity, so Intel wins all around.
not having to pay to other manufacturers for production of your chips $20k/wafer skyrockets your profit margins. when nv has to pay $200 for a 4090 chip (yes, its exactly how much it costs to make a 4090 $2000 GPU chip, probably even less now) to TSMC or Samsung, Intel just rakes in all the profits. and with 185 wafers/h @$20k/wafer price $350 mil machine pays for itself in 4 days. literally.
It is a huge bet. However I don't see Intel succeeding as a fab service provider. It is not like they didn't try that before. The PC market is less then booming. On top of that the x86 architecture is being now seriously at the brink of being phased out. What do they have that they want to fill those production lines with? And in esp. what can they offer that actually requires the latest node to be competitive in production?
@@rosomak8244 you can produce any chips with these machines. its not locked somehow to only x86 chips production. the main Intel fab client is Intel and they are safe. PC market is less then booming due to GPUs having 0 progress and being overpriced because corporations raised prices for miners and 'forgot' (didn't want to) to drop them back after mining was gone. basically nv sells 4 times less GPUs but for 4 times money more each so they are fine. just like everyone else. they sell way less then before but make way more profits than ever. Intel actually didn't try that before because they've chose to milk 14nm ++++++ instead as way more profitable approach of making business at the time. but eventually got kicked a bit by Ryzen, so they were forced to change because the market has changed. also they got into GPU business just because they've seen insane nv/amd margins. and they know those margins are insane because they run fabs themselves and know exactly how (really not that) much it cost to make those chips.
@@rosomak8244 you can produce any chips with these machines. its not locked somehow to only x86 chips production. the main Intel fab client is Intel and they are safe.
@@rosomak8244 PC market is less then booming due to GPUs having 0 progress and being overpriced because corporations raised prices for miners and 'forgot' (didn't want to) to drop them back after mining was gone. basically nv sells 4 times less GPUs but for 4 times money more each so they are fine. just like everyone else. they sell way less then before but make way more profits than ever.
Everybody is so impressed... gigantic amazing tools... more and more... so much blablabla but we're in a closed system and all that has a cost. What is truly impressive is the speed at which we approach a seriously destructive nonsense, globally. Why do we still believe in exponential growth? Sane humans do not need the powerful computing devices enabled by further tech nodes. Even though a semiconductor specialist, I wish we would rather exponentially develop values that lead to a sustainable humanity. I came to realise that the entire semiconductor business started with a strong military bias, and continued to growth as a monster like structure that needs to be fed by billion of hungry customers unnecessarily renewing their computers, mobile phones, smart watches and so on - does that make them happy? Who will work in the new semiconductor mega fabs resulting of the chip act? Hum, let's have a guess... Chinese immigrants? Certainly not the young Americans dreaming of an easy and wealthy life fed by AI. Yeah, time to retire, as much as I had big dreams as a kid passionate of high tech, as much it now becomes a huge hangover.
@10:55 Although you probably singed an NDA, you know what other machines you saw inside the fab. I would guess even some Japanese equipment manufactures.
I'm surprised that these clean rooms don't use SpaceX suits (with a special coating).. And as the process gets smaller, I'd suspect that these fabs will need to be constructed in mountains to contend with space radiation and the purity of the compounds so high that there will be very high cost prohibitions.. and I wonder about the longevity and delicacy o the newer chips..
I have read that Intel's newest machine is the prototype of what they are going to get. To test out this tech. So the production machine is still coming.
The complexity of this thing is obvious from looking at it. There are many parts put together hat do not repeat in a regular pattern. Nothing is there that shouldn't be for a definite purpose.
Does Intel buy or lease the ASML machines❓ Can Intel build them without ASML❓ What is the cost to build them, vs buy them at 350mil. each❓ Will Intel ever be free of ASML❓ What is likely to replace lithography❓
Buy No $350m all-in. Buy, delivery, install. No Not much. The nanoimprint stuff last year didn't even mention process node equivalents (and I asked about it and they refused to say).
@@TechTechPotato It is doubtful if NanoImprint will ever be viable. Yes it could be fast but it is a contact process, basically stamping, which makes it very sensitive to defects/particles. One particle on your "stamp" and every wafer after it is bad, inspection would become essential and expensive.
It was never EUV machine that Intel was behind other players. TSMC and Samsung have or will have the same machine. How is it different this time? Does Intel study its own past and get it right this time?
That's marketing, most new tech is 10nm but since they are making 3D fets (think of turning the parts on side-edge...they call it next generation for lay people.
actually the most expensive piece of equipment in the world would most likely be the fusion experiment ITER at 45-65 Billion USD it also weighs much more, and is considerably larger... lol :)
3D printer tech needs to be ramped up to the level of these machines. so much so, that these machines are something that can be manufactured via 3D printing.
Intel has been producing lots of lighting & thunder but very little rain. Ultra Mobile Processor: Behind Apple & Arm. Non existing basically. Laptop Processor: Behind Apple/AMD/..and soon ARM. Desktop: Trade blows with AMD. Too hot even with the latest and greatest. Server: AMD DESTROYS Intel on server chips. Not even close. GPU:...: See you in TEN years. If that. A.I....AI????? See you in FIVE years. Maybe. Maybe, just maybe, they can cut down all this marketing nonsense and ACTUALLY focus on producing stellar products. AS OF RIGHT NOW, there's not ONE SINGLE Intel product that stands out from the competition. NOT. ONE. I take that back, their NIC chips are still the best in the business.
The United States needs to comprehensively rebuild and review its local engineering talent training system and construction department. The current construction efficiency is too low. If the United States quickly transfers all electronic component production lines to Japan/Taiwan/Germany/the United States, ASML and other equipment manufacturers will not be in a situation where they may face significant loss of interests due to the trade ban.
i feel so stupid and useless.. its insane that humans accomplished to build machines like that. i didnt understand one word and have no skills in tech, but even a bozo like me realises how much resources it took to plan and build these. maybe humanity has a chance after all.
I have always been fascinated by this highly secretive industry. They might as well be practicing black magic and voodoo to do what they do. To me, I still find most of what they do to be impossible along the hundreds of steps from silicon wafer making all the way to chip packaging. This is all god like craftsmanship to me. Amazingly, all these billions of dollars spent in tooling results in chips costing a few dollars that hid in nearly everything I touch and pickup. The microchip industry is truly a fascinating domane
