Thanks for the informative explanation! I messed with FPGAs during my undergrad and was curious about their usage in synthesizers. Your video explained what I wanted to know.
Thanks for this FPGA session, Eric! It’s an honor to be taken along when you explain your design decisions and workflow. This will add to the appreciation for my Three Body.
Hey, im currently getting an EE degree and am working with FPGAs. Please make more content about fpgas and their applications in synthesis/audio. Keep up the good work 👏👌🙌
Thanks for this Eric, I found it very interesting and I'd definitely like to see more videos about your experiences designing with FPGAs. I have a Red Pitaya board with a Xilinx Zynq 7010 FPGA and I'd like to use it to process the 8 signals from the CycFi Nu Multi pickups on my guitar, but I haven't done any digital design since university, so I'd love to hear about how you got on with the Three Body design.
Definitely make more videos! Love the deep dives, don't know how interesting it is for others but would love to see a low level block you designed, how you tested it at the block level, and integrating at the full design level. Super cool hearing how deep you went with this project!
I've been working in Chisel for the past couple of years on the MiSTer FPGA project (recreating retro arcade machine hardware). Like you said, for system-level hardware design it really shines as you are able to manage things more easily at a higher level. It also gives you the ability to write unit tests for your hardware designs, which saves wasting a lot of time debugging on an actual device.
I love the work you've done on the MiSTer- I follow your GitHub. Curious about your workflow- do you write HDL in Chisel and then output to Quartus to do the final compile for the hardware?
@@BenWard29Sorry only just saw your question. Thanks! Yes the workflow is chisel -> verilog -> bitstream. But the whole pipeline is automated with a make task, so there is no extra effort on my part.
This is why I think Eric so very different than most modular engineers... he's so intensely though full about his approach.. this Is why I literally buy two of whatever I can.. to keep his business alive regardless. And the extreme diversity of function is phenomenal.
This is so cool! I just finished my Comp Eng masters and my final project was an FPGA based guitar speaker simulator, its still rough around the edges but it works. Once the FPGA shortage cools off id love to design a custom board to fit in pedal enclosure
i'm really glad you made this video, because i have been on the fence about several fpga modules and thought they were an outdated technology (largely because of the complexity of updating them), without understanding anything about them. this really cleared that up, thank you
What a wonderful unexpected treat. Thanks for taking the time to go into this, I enjoy understanding the thought process behind the decisions. I think you're just scratching the surface and can't wait to see where it leads you!
It should be in every rack, probably one of the most powerful complex VCO's out there, but I don't care about the tech too much because I don't understand any of it.
Thanks for this - such a clear explanation of the things to consider in FPGA vs microcontroller / CPU decisions. Looking forward to where you go with this...
came across the video on using the FPGA on your Three Body. I've invented and programmed for years, now just lazy and programming for a Japanese rock star... but I've got some ideas of using FPGA along with outdated match co processors AND GPU as the massive calc using Cuda Core. It would be extreme, and a step up from bedroom... but it would be something synthesis has lacked since the Synclavier/Fairlight days (which I also used to program) I'm based in a $20 million studio here in LA, and can't travel due to physical inability. love brian
Im looking to write my bachelors essay about an fpga Project early next year and to me it is so exciting that youve done this. Maybe ill Experiment with audio oscillation as a fun preperation for that in my spare time. Huge Respect for your Work and looking Forward to more Videos (even more technical would be great but i understand you probably want to keep some Secrets :)
Originally I thought an audio oscillator would be a great first project on an fpga because it's so basic 😅 Actually I still think it was the right choice and I did get the first prototype working in a few months, it's just a long road to something that is polished and done. I will do more videos for sure. I can't open source the files themselves because of the cloning situation in the audio world but I don't think there are (or should be) any secrets here, it's all based on papers and data sheets from twenty or thirty years ago or other peoples open source work so I will share as much as I have time for 😁
@@SCHLAPPIENGINEERING thanks for the quick Response. I originally thought to make a Trigger sequencer because those wouldnt even need adcs if its Just about making Something for the Sake of making something. I even have a Great Idea for one but i already Made it on a Microcontroller and when its already done it feels a little boring to do ist again but differently. Looking Forward to the Videos and maybe ill try and save Up for a three Body Allround a cool Module!
Great video, look forward to seeing more on how you implemented the synth engine in the FPGA 👍 I would love to see a product like the Electrosmith Patch.Init(), but with an FPGA instead of a CPU, for learning synth design at the hardware level.
Awesome! I've though about this a bit. It's certainly doable but would either require a library of verilog modules as examples or one of the higher level languages. Verilog has a lot more footguns than any other method of digital design I have seen so far (barring assembly I guess).
Super interesting stuff! Would love to see a from scratch explanation of something fundamental like building a simple oscillator with V/oct control, I think you explain things well!
Loved your video Eric! It was very thoughtful and detailed. I would love to see more videos and will be looking out for them! As a hardware designer myself (only analog oscillators and filters thus far- and just for "personal use"), what was the thought process about specifically having digital oscillators and going that direction instead of analog? Was it just a good bit of synchronicity that you could design a great little digital oscillator as well as use it for a learning experience (as you said later in the video), or is it something sonically that you really wanted from a digital oscillator that you couldn't/didn't want to do in analog? Besides Mutable's Plaits, I haven't really found many digital oscillators that have struck my fancy (and I like Plaits mainly because it is a swiss army knife that has so many sounds and uses very little space). I was looking at Make Noise's DPO but your design looks interesting- I'm going to check out the overview video. Thanks Eric!
HI Ben, thanks for your comments! The big things that led me to a digital design were: wanting to explore Chowning style ratio FM, arbitrary phase modulation, and through zero FM. These things are not impossible in the analog realm but generally involve quite a bit of logic (and trimmers) to implement and always feel very hacky to me. I've tried to do frequency division and multiplication for ratios in the analog realm before using PLLs and never achieved anything very stable. I do think I go a bit deeper into my reasoning into the video.
Would love to see a course on how you used the Lattice FPGA to implement some of the features. The little that I've seen, it seems FPGAs are so much more complicated than microcontrollers.. things like crossing clock domains, setting up timing timing constraints, and just thinking in terms of parallel execution (blocking vs non-blocking), etc. Also any thoughts on python tools that can help build fpga systems? For example, I understand migen->nMigen has become Amaranth HDL.. but there's also Chisel or Spinal HDL. Or for building SoCs.. LambdaSoc (Amaranth HDL) vs LiteX (m-labs or whitequark's Migen/MiSoc)?
I have a talk coming up at Crowd Supply Teardown where I will probably talk about some of this. I think I might be trying to transition away from the Lattice FPGAs since the prices tripled during the pandemic. I think it all depends on your background and learning style. As a hardware guy I rather like using FPGAs and writing in verilog. I have not had much luck with the python tools but if your background is software YMMV.
I'll have to get one of these. Question: Has the initial release programming for the FPGA ever been updated? It's hard to imagine there are no bugs. Is there any way to update? I would love to see the schematic diagram for the programmed gate array, even just one of the oscillators. My entry into computing came by way of logic chips. I studied binary adder, multiplier circuits ages ago.
No updates, no known bugs in the default configuration (not sure how many people are digging into the header options). Updating is certainly possible using the open source tools and usb jack on the brain board to replace the bitstream but there has been no need so far for any user to do this. More videos on the internal structure and verilog may happen eventually but generally designing new things takes precedence.
Thank you for this. Is it cheaper to implement your own del sig adc/dac than use ICs? Also, have you looked at lower level alternative HDLs like pipelineC, Silice, and Clash? I suspect they provide the right level of abstraction.
It depends! The amount of FPGA fabric taken for a second order delta sigma is trivial (around 100 LUTs) but the differential output filter requires a pretty decent op amp and a significant number of passives which should all be thin film 0.1% resistors or 1% np0 capacitors so it may actually be about the same price as some cheaper off the shelf ICs like the AKM line, especially if the output level and drive capability of the DAC matches your needs. As for HDLs I've seen some Silice stuff (which looks nice) but not the others. I'll take a look at pipelineC and Clash, would be nice to have pipelining taken care of! I'm really a hardware guy though and a lot of these higher level solutions assume skills in setting up convoluted toolchains or learning new syntax that a software dev or embedded engineer would take for granted but I find a lot more difficult than just writing verilog. I used C and C++ for work about a decade ago but have no knowledge of haskell/rust/etc and very little python. I like things that can be represented as schematics and logic diagrams.
hi Eric, thanks so much for putting this video together, and I look forward to future videos on this topic. i took some notes, so i have a bunch of questions. how complicated was setting up the clocking between all of the external ADCs and the FPGA? did you need to do any optimization to get the code to fit in the 12k LUTs? (ok i heard the bit about you used all of them) pinout/layout challenges - did you have any, with all of the ADC/DAC io? for the DACs, did you need to get into the source code at all to figure out strangenesses, or are things mature enough in open-source FPGA-land that things worked as described? 'a coprocessor of some sort' - like a risc-v kind of thing, running some kind of low-level firmware, or would you do linux? ok i heard the bit about just picking an fpga+microprocessor soc, that's a great tip i would love to see some kind of video on how you wired the different parallel blocks together, like at a high-level 'here's the layout, and here's how i set up the buses and yes i had to write my own intercommunication logic' i'd love a bit more detail on why audio rate cross modulation/aliasing requires such a high sample rate (i have a basic understanding, from the normal nyquist frequency discussions in standard dsp books, but this sounds like a corner case i have no clue about) and huge thanks again; i've been looking forward to seeing these videos almost as much as i've been looking forward to getting my hands on the 3 body itself. your learning process sounds fairly similar to mine (i need to understand the low level before i feel like i actually understand something), so i can appreciate the journey you've made, especially since you've been using OSS toolchains the whole time. I imagine you've seen a lot of change on that front too!
Hi Annan! That is a lot to respond to! The clocking with the ADCs wasn't too bad, it's just SPI and there are many examples out there for that. No real optimization is needed for just three oscillators, it is totally possible to do tens or hundreds of oscillators on this sort of chip depending on how you want to do it. Pinout/layout challenges weren't too bad, by having the BGA for the FPGA on a seperate board from the control board I was able to keep each PCB to only 4 layers, and no external signal was running faster than 25MHz which isn't too bad, I did need to put some resistance in series with the clock signals to reduce reflections or I got some very strange errors. That was not at all the first sigma delta implementation I tried, there were a few non-working ones I found and when I tried to do it from scratch I was able to do a first order but not second order. It's one of those things that's only a couple lines of code but still pretty tricky to get right (even after I read a textbook on the subject), so I was very thankful when I did find a working implementation. One subtlety is that you need to keep the input below about 80% of full scale or it distorts pretty badly. Open source FPGA land is a bit confusing, the fully open toolchain is new but obviously not verilog. There are lots of decade old code snippets floating around. There are some very cool riscv soft cores, I plan to do more experimenting with NeoRV32 and have had good luck with PicoRV32. Any microcontroller you like should work as well, and yes, the chips with both FPGA and CPU tied together are awesome, just a bit expensive. A video on interconnection and bus logic would be cool! The cross modulation is tricky (specifically phase modulation) because it generates harmonics and those harmonics generate harmonics and those harmonics and so on, and if it does start to alias then it gets worse because the aliasing then piles on top of itself... I'm so glad you enjoyed the video and got something out of it! It's been a really interesting journey for me, a lot of puzzles to solve. I do think the OSS toolchain is a good place to start, but for people interested in meeting deadlines it may be worth using some of the higher level tools out there (either in the OSS world or out of it).
@@SCHLAPPIENGINEERING no need to reply in depth, Eric, it is a lot for sure. I appreciate any info though, and I'm sure some of this will be covered in later videos!
Something that might happen, or might not. I have made a few prototypes but so far nothing is so good that it has stayed in my live case for very long. The Three Body already does so much adding to it may, or may not, make any sense.
i believe we lost a lot of creativity w/o going up higher in sample rates. Imagine sweeping 512 octaves for a sample and hold matrix mod on a totally different wavetable? there are thousands of creative paths that we've been cutoff by the adults in the room saying "you don't need/or can't hear above this sample rate/bit depth. Gr8 start man... keep on going.
