TinyBeast FPGA Polarfire: PCIe Reference Design 

I was totally excited to sit down and watch this walk-through as I am beginning to test the waters of a FPGA design. But FPGA Zell it appears to give us a video of him talking to himself in front of a camera. We are unable to read your thoughts so as you mouse around the screen making comments we are lost to what is going on in your head and what you are doing. I hope your future videos will have more of a explanation to what you are thinking as you look around the GUI.

Mind uploading the design files to GH so we could understand what's going on a bit better? Because you're familiar with your code, you go through it quite fast, too fast. I also have a Zuboard (no m.2 adapter, though), so I'm also curious about how you've set it up for this test. I'd love to experiment with PCIe on both Xilinx and Altera platforms, but sadly my other FPGA is a DE10-std so that's not happening until an affordable Agilex 3/5 comes out