"Ma'am, in the D flip-flop, the truth table you provided was quite opposite to this one. Besides, both diagrams are the same. I mean, in that D flip-flop video, you used a NAND gate SR latch/flip-flop, and here also, you have used the same. However, how come the truth tables are different?"
In case of D FLIP FLOP WE APPLY D AS INPUT TO S AND D' AS R SO FIRSTLY THERE WILL BE ONLY TWO COMBINATION IN CASE OF T.T. OF D FF AND IF D=1 next sate will be 1 If D=0 next state will be 0 So please check once
