John's Basement

John's Basement

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Pragmatic discussions of all things related to designing, building and programming embedded systems.

FPGA #22 - Clock Domains, Metastability, and Synchronizers

29:05

FPGA #22 - Clock Domains, Metastability, and Synchronizers

21 день назад

FPGA #21 - Verilog Bidirectional Open-Collector Drivers

20:56

FPGA #21 - Verilog Bidirectional Open-Collector Drivers

Месяц назад

FPGA #20 - Verilog Tristate Drivers and the ICE40 SB_IO Module.

53:53

FPGA #20 - Verilog Tristate Drivers and the ICE40 SB_IO Module.

Месяц назад

Simple PS/2 Keyboard Interface in Verilog

1:00:11

Simple PS/2 Keyboard Interface in Verilog

Месяц назад

VGA Sync Generator and Color Bars in Verilog

1:08:03

VGA Sync Generator and Color Bars in Verilog

2 месяца назад

An Introduction to VGA Signal Timing

1:03:27

An Introduction to VGA Signal Timing

2 месяца назад

Z80 Retro #74 - 3D Printed Stackable PCB Standoffs

19:59

Z80 Retro #74 - 3D Printed Stackable PCB Standoffs

3 месяца назад

Z80 Nouveau Peripheral Shopping

1:10:45

Z80 Nouveau Peripheral Shopping

3 месяца назад

Opti-Tekscope Digital USB Microscope Camera Unboxing and Linux Testing

27:11

Opti-Tekscope Digital USB Microscope Camera Unboxing and Linux Testing

3 месяца назад

Z8S180, ICE40HX CP/M BIOS Port Public Release

1:14:49

Z8S180, ICE40HX CP/M BIOS Port Public Release

3 месяца назад

Z8S180, ICE40HX CP/M BIOS Port Part 4

48:49

Z8S180, ICE40HX CP/M BIOS Port Part 4

4 месяца назад

Z8S180, ICE40HX CP/M BIOS Port Part 3

1:31:47

Z8S180, ICE40HX CP/M BIOS Port Part 3

4 месяца назад

Z8S180, ICE40HX CP/M BIOS Port Part 2

2:11:11

Z8S180, ICE40HX CP/M BIOS Port Part 2

4 месяца назад

Z8S180, ICE40HX CP/M BIOS Port Part 1

2:19:09

Z8S180, ICE40HX CP/M BIOS Port Part 1

4 месяца назад

FPGA #19 - A look at the iCE40 Technology Library

1:07:35

FPGA #19 - A look at the iCE40 Technology Library

5 месяцев назад

FPGA #18 - Verilog Finite State Machines Part 2

1:10:04

FPGA #18 - Verilog Finite State Machines Part 2

5 месяцев назад

FPGA #17 - Verilog Finite State Machines Part 1

56:42

FPGA #17 - Verilog Finite State Machines Part 1

5 месяцев назад

FPGA #16 - Verilog case, casez, and casex

59:06

FPGA #16 - Verilog case, casez, and casex

5 месяцев назад

FPGA #15 - Verilog Modules, Parameters, and Localparams

1:26:24

FPGA #15 - Verilog Modules, Parameters, and Localparams

6 месяцев назад

FPGA #14 - Verilog Always Pt. III (Synthesizable Design Patterns)

41:36

FPGA #14 - Verilog Always Pt. III (Synthesizable Design Patterns)

6 месяцев назад

FPGA #13 - Verilog Always Pt. II (Nonblocking Assignments)

34:28

FPGA #13 - Verilog Always Pt. II (Nonblocking Assignments)

6 месяцев назад

FPGA #12 - Verilog Always Pt. I (Combinational Circuits)

56:51

FPGA #12 - Verilog Always Pt. I (Combinational Circuits)

6 месяцев назад

Z8S180 Breakout Board Testing Pt. III

43:05

Z8S180 Breakout Board Testing Pt. III

7 месяцев назад

Z8S180 Breakout Board Testing Pt. II

39:43

Z8S180 Breakout Board Testing Pt. II

7 месяцев назад

Z8S180 Breakout Board Testing Pt. I

41:06

Z8S180 Breakout Board Testing Pt. I

7 месяцев назад

Z8S180 Breakout Board Assembly

32:47

Z8S180 Breakout Board Assembly

7 месяцев назад

FPGA #11 - Priority Routing Network

7:36

FPGA #11 - Priority Routing Network

8 месяцев назад

FPGA #10 - Verilog == and === operators

12:06

FPGA #10 - Verilog == and === operators

8 месяцев назад

FPGA #9 - Verilog Vectors & Arrays

1:05:00

FPGA #9 - Verilog Vectors & Arrays

8 месяцев назад

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