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Analog Design interview_ What is the steady state voltage at source terminal 

Amit Bar
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There is one small calculation mistake at the end,
Vx will be 1.25 V and Vs will be 0.75V..Thanks
Analog Design Interview/Screening Test questions for Texas Instrument ,Micron Technology, ST Microelectronics, Synopsys, Steradian semiconductor, NXP Semiconductor, Analog Devices, Intel, Samsung etc.
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23 фев 2024

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Комментарии : 4   
@dushyantsinhdabhi4772
@dushyantsinhdabhi4772 5 месяцев назад
Here, in the last step the Vth=0.5V; so 2=2Vx -0.5; so 2Vx=2.5; so Vx should be 1.25v right?
@YashRPant
@YashRPant 5 месяцев назад
It is stated in video description
@AdityaKumar-nv3or
@AdityaKumar-nv3or 5 месяцев назад
that's +0.5 instead of minus
@amitpadey6208
@amitpadey6208 5 месяцев назад
Vx calculation is wrong in the last
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