Boolean Algebra And LUTs in FPGA 

Paras Jain thank you sir!

Thank you! Really

thank you good sir

thanks

Thank you

LOL

Why????, he already has got one!!!. Let him do things his way!!!!! If something works for you it does not mean that the same thing works well for others.:)))))))))))))))

or some shirts

Please, you should not be mean. He is doing great!

It’s been 7 months. How’s the journey so far?

patreon.com/nandland :)

+cile88 +nandland I have the same question!! Exists 3 inputs Or--Gates ?

Not googling that one...

The synthesis tools will take care of this. In the real world you don't often need to count individual LUTs.

​@@Nandland What would a synthesis tool do, for example ?

Hi LUTs are close to multiplexers. Look up the Shannon Expansion theorem. I can recommend googling "Implementation of Boolean Functions through Multiplexers with the Help of Shannon Expansion Theorem" . You'll find your answer in the conclusion of that document i think. The doc is not the best on explaining the theorem itself, for that there is a nice video on youtube. Can't remember the name of the video right now. I'm learning about FPGAs myself right now, are you ? :) Maybe you ask more what mechanism makes it reconfigure ? SRAM cells usually.

I guess, a LUTs are a complex arrangement of logic gates (maybe NAND gates), in a matrix shape, where each of these gates are interconnected by wires. When we program a LUT, we actually decide which interconnections to activate between the required logic gates. That's how the LUTs can reconfigure themselves according to the boolean function. This is just my thinking, I don't know if it's correct.

I guess it is good to imagine LUTs as mini FPGAs themselves. A matrix arrangement of universal gates, interconnected by thousands of wires. Thus, several combinations of logic gate connections are possible.

At 10.14 c is high and you called it not.

Your truth table will have no output for a not, b not, c not.

You should post a link to your videos on FPGAs.