I like these review videos - I've pretty much got to the point where I can anticipate a lot of Phil's points about designs now, which I think is a good sign for myself!
Thanks! That's right - a lot of the points I mention are very common across peoples' projects and typical 'mistakes' (or things that could be improved). I'd love to make a video on a far more formal design review process at some point (with much more depth) - but that would be a rather long video indeed!
@@PhilsLab a video like that would be a great resource for people just starting their engineering career. It’s definitely not something I was taught in college myself
Indeed, but keep in mind that critiquing other people's designs is much easier than your own designs. I found out about this after Phil pointed out the mistakes in my design in this video. It might be helpful to have a design review checklist for future designs.
@@km-electronics1 I've been designing boards for my business for he past 5 years, along with FPGA designs and robotics (I work in the event/creative tech industry). I like to have videos playing while I work though, and usually electronics channels. Constant learning and reinforcing is good 😁
@Phil, thank you for making design reviews. Applying the guidelines and rules of thumbs to a practical design can be quite hard sometimes. I love that you give advice to improve the design for everyone to learn.
Thank you so much for featuring my design. I have to admit that most of the mistakes were embarrassing and I might have captured them easily in someone else's design. Well, this isn't an excuse. I designed the buck converter using TI's online tool which is probably the reason for dodgy values. In hindsight, this was not a smart move. I have to ask you a question, though. I normally import my footprints from websites like Ultralibrarian and Snapeda. I noticed that their courtyards are gigantic. How do I size the courtyard for a footprint?
It’s always hard to catch your own mistakes. Your mind knows what it’s supposed to look like, so you don’t see what it actually looks like haha But isn’t that what peer review’s for? 😊
Thanks for sending in your design, Khadem. Don't worry - everyone makes mistakes (even 'simple' ones), a great way of learning though. If I look back at some designs I've made (even from the same year), I see things that I could've done better and that in turn means I've progressed, which is a great thing. Regarding your question: I never use Snapeda or the like but always try to make the footprints and schematic symbols myself (for a multitude of reasons). For footprints and sizing (incl. courtyards) I use the IPC-7351 standard - which is luckily part of Altium Designer's IPC-compliant footprint wizard.
I think nothing was embarrassing here. You're seeing it from the wrong perspective. The more common mistakes you make, the better the video gets for everyone else. If you have the perfect schematics and layout then Phil can only comment on good design decisions which is nice but the 999 pitfalls are hidden and not commented. Thank you both for your valuable input!
@Phil’s Lab Phil, not denying the advantages of a well structured hierarchy of schematic sheets in a common pdf, but... one potential benefit of a well structured single page schematic is the ability to turn it into a single image file and drop it onto a web page where what you see is what you get with less danger of downloading a potentially sus file.
This form of circuit layout seems to be coming from the RU-vid University, where the important part is not showing the circuit flow from left to right as we were taught in the old days. But as long as you can put each active component in a box and join the pins to a netlist your doing fine. I find these drawings a bugger to fault find as you can’t easily see if a connection is missing as all as connectivity is in the mind of the creator. When was the last time you saw a bus drawn on a circuit.
I agree, most circuits you see have a whole bunch of blue boxes apparently randomly placed with no regard for the right to left flow that makes so much sense.
I'm split on this topic. Years ago, circuits were mainly analog, where the overall layout of the schematic was important for circuit analysis; or they were MPU based with a single data and address bus connecting everything. Today, most are modular and digital, with well-defined analog sections. Personally, I hate all-in-one diagrams with a rats nest that I have to follow with my finger, or with a pencil on a printout !!
Thank you sir for these amazing content, can you please do a series on C\C++ programming for ebedded systems, the resources on the internet that are well explained are quite scarce.
ifAs this is a safety device would you go to the extra effort of fitting a power supervisor with built in watchdog as opposed to using the uC’s own internal watchdog?
Hi Phil. Nice review again ! Do you answer to each design review request you get through your website or do you get too much of them and only answer to the ones which interest you ? I'm asking as I sent you a message a while ago :)
Phil, your channel is an excellent reference on STM32. Please advise how one can interface a 4-20mA transmitter signal reliably to STM32 ADC. Is using a precision resistor all it takes? The voltage drop across this resistor would be high for the loop, we may need an amplifier before the ADC to reduce the resistor value, what do you recommend? Thank you.
When would one chose a synchronous buck over a normal diode one? Or rather when would be worth it ? Also would making one with the pins of the MUC be a good idea (and then disable the LDO ) so that the MCU self powers via a buck.
I'm with Dave Jones on his view of multi-page schematics... only if you really have to. It's much easier to have everything on one page so you're not jumping between pages. I'd use separate pages only for completely separate and independent modules/boards. But, I agree that maybe there are too many sections in this schematic; everything MCU-related should probably be in the same section. Also, 1pF cap and no pull-downs/pull-ups on FET gates... hmm?
Great review Phil, Can you elaborate more on the comment about ESD protection for the VFC for the alarm outputs, considering that the outputs could be connected to various voltage levels. (ru-vid.com/video/%D0%B2%D0%B8%D0%B4%D0%B5%D0%BE-eZnyBt2LVoc.html)
