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Digital PLL Frequency Synthesizers: what they are, how they work 

ElectronicsNotes
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Digital PLL synthesizers are a form of frequency synthesizer that are used in many radio frequency designs from broadcast radios to high performance professional radios and signal generators to spectrum analyzers and many more forms of electronic equipment.
As the name suggests, these synthesizers are based around the use of a phase locked loop or PLL.
PLLs work by using a phase comparator to compare the phase of RF signals from a fixed frequency reference and a voltage controlled oscillator, VCO. The resulting signal from the phase detector can be used as an error voltage to be fed back via a loop filter to the control terminal of the VCO. This has the effect of reducing the phase difference between the reference and VCO signals to a point where there is a fixed phase difference betweenth e two signals and the PLL is in lock and the VCO and reference are on exactly the same frequency.
This can be used in a frequency synthesizer by introducing a digital divider into the loop between the VCO and phase detector. As the loop tries to reduce the phase difference and hence the frequency difference between the signals at the input of the phase detector, if a digital divider is placed into the circuit, then the VCO will run at a multiple of the phase comparison frequency determined by the division ratio of the divider - a division ratio of two will mean the VCO runs at twice the phase comparison frequency and so forth.
To reduce the phase comparison frequency and gain smaller step sizes, the reference oscillator frequency can be divided down to give the required phase comparison frequency.
The final stage in the realisation of the digital PLL frequency synthesizer is to make the divider within the loop itself programmable. In this way the division ratio can be set and the output frequency can be determined.
More details about digital PLL frequency synthesizers can be found: www.electronics-notes.com/art...
More details about the different types of frequency synthesizer: www.electronics-notes.com/art...
Website: www.electronics-notes.com
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16 май 2024

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Комментарии : 44   
@markeesfuller5389
@markeesfuller5389 3 месяца назад
These videos are reigniting my love for engineering.
@ElectronicsNotes
@ElectronicsNotes 3 месяца назад
That is really great - that is what I am aiming to do. I’m glad you found the video useful.
@cthutu
@cthutu 9 месяцев назад
The very BEST video I've seen so far on how a PLL might work to increase clock frequencies (e.g. inside a FPGA). It isn't bogged down with implementation details, just the top-level concepts. This makes a lot more sense now. You take an input clock frequency (F) and the output frequence will be (F/M)*N, where M and N are integers.
@ElectronicsNotes
@ElectronicsNotes 9 месяцев назад
I am really glad you liked the video. I know from my own experience like to start with a top level explanation and then dive down when I understand the basic concepts. Thanks.
@brandonnie5179
@brandonnie5179 3 месяца назад
Wow amazing. I just needed to learn how PLL works for work but I don't want to spend days learning about the nitty gritty about it. This is the perfect video. Easy to understand and short. Thank you.
@ElectronicsNotes
@ElectronicsNotes 3 месяца назад
I’m really pleased you found the video useful. Thanks for your comment.
@ritesha8050
@ritesha8050 Год назад
thank you, just subbed. it makes 100% sense my teacher told us to self study that 1 week before exams.
@ElectronicsNotes
@ElectronicsNotes Год назад
Glad the video helped.
@chinmaykaul7746
@chinmaykaul7746 2 года назад
Great Explanation!! Keep it up👍
@ElectronicsNotes
@ElectronicsNotes 2 года назад
Thanks for your comment. I really appreciate that.
@TheMadMagician87
@TheMadMagician87 2 года назад
Very concise description, thanks.
@ElectronicsNotes
@ElectronicsNotes 2 года назад
Glad it was helpful!
@pupuldalbehera3452
@pupuldalbehera3452 Год назад
best description of pll
@ElectronicsNotes
@ElectronicsNotes Год назад
Thank you so much for your comment. Really glad the the video was useful.
@savy9554
@savy9554 2 года назад
Amazing explanation sir 💜
@ElectronicsNotes
@ElectronicsNotes 2 года назад
Glad you found it useful.
@thajapungphangairangbam1227
@thajapungphangairangbam1227 2 месяца назад
The best video Now concept clear . Thank you
@ElectronicsNotes
@ElectronicsNotes 2 месяца назад
So glad the video was useful for you. I really appreciate your comment. Thank you.
@whatevernamegoeshere3644
@whatevernamegoeshere3644 3 месяца назад
This was great, thank you so much :D
@ElectronicsNotes
@ElectronicsNotes 3 месяца назад
Glad you found the video useful.
@augustrosenberger8591
@augustrosenberger8591 Год назад
Awesome video!
@ElectronicsNotes
@ElectronicsNotes Год назад
Thanks for your comment. Really glad you found it useful.
@jonka1
@jonka1 2 года назад
Beautifully described thank you.
@ElectronicsNotes
@ElectronicsNotes 2 года назад
Thank you for your comment. Glad we were able to help.
@bonbonpony
@bonbonpony 3 месяца назад
So the programmable divider and VCO need to be rather fast devices, right? Usual TTL/CMOS counters won't suffice if we need the output signal to be eg. 60 MHz or more?
@ElectronicsNotes
@ElectronicsNotes 3 месяца назад
Yes, they need to be fast enough to take the incoming VCO frequency.
@mofaelectronics1295
@mofaelectronics1295 Год назад
hi sometimes we have a rf signal that it's not repeatitive sampling this signals requires a very high samle rate analog to digital converters how can we downconvert this not repeatitive signals and use low sample rate analog to digital converters ? is there anyway?
@ElectronicsNotes
@ElectronicsNotes Год назад
Yes, that approach would certainly be possible.
@Carlos-en5vz
@Carlos-en5vz 9 месяцев назад
why do we need to lock refclk to VCO output? why can't we just use a VCO directly as a frequency synthesizer and control the output frequency by varying the voltage?
@ElectronicsNotes
@ElectronicsNotes 9 месяцев назад
The whole idea of the digital PLL synthesizer is that locking it to a crystal oscillator gives it the high frequency stability of the crystal oscillator. If you just use a voltage controlled oscillator on its own, then it would drift everywhere because there would be nothing to detect and correct any drift in frequency.
@Carlos-en5vz
@Carlos-en5vz 8 месяцев назад
@@ElectronicsNotes thank you sir
@tr_2sc1970
@tr_2sc1970 3 месяца назад
Excellent explanation, yet almost all the information from engineers are basic blocks and superficial reference to the complicated mathematics of the programing of the PLL chip. I have some PLL chips, I need to learn to access and get to run, there isn't any application note for them. Well, the data sheets have basic information for qualified and experienced engineers in the field. But some elaborate examples from talented tutors to newbies, hobbyists, nonexperts would be a hit. Something like setting the chip to default, load with parameters and save a frequency and most important how to extend and expand from this outset. Bringing a PLL chip like the SN761672 or TSA5511 or any other and showing things on the oscilloscope along with frequency counter and a receiver etc.
@ElectronicsNotes
@ElectronicsNotes 2 месяца назад
I confess that I always found the data sheets were a bit lacking. They were of the ilk of "the magic happens here" and no real explanations of how to design with them.
@tr_2sc1970
@tr_2sc1970 2 месяца назад
under competition stress they release the part accompanied with mass commercials than support. I guess giant customers get hotline and support once they experience problems.
@JESUSCHRYSLER5512
@JESUSCHRYSLER5512 Год назад
MY BELLY BUTTON KEEPS DRIFTING OFF FREQUENCY, IS THERE ANY WAY TO PUT A PLL CIRCUIT IN MY BELLY BUTTON SO IT DOES NOT DRIFT?
@ElectronicsNotes
@ElectronicsNotes Год назад
I think you need to see your doctor. Belly button drift can be serious. (LoL)
@rhalphaugusto
@rhalphaugusto 2 года назад
Bring us sone numerically controlled oscilator, please.
@ElectronicsNotes
@ElectronicsNotes 2 года назад
The digital dividers used between the Vic and phase detector are normally controlled digitally and this means that the frequency of the synthesizer can be programmed by a processor or other digital control.
@TooSlowTube
@TooSlowTube 2 года назад
@@ElectronicsNotes I've been looking at FPGAs, and I see there are templates ("IP") for making PLL circuits in them. I'm now wondering how they make the loop filter, since it's effectively all logic gates. Do they get to skip that part? I guess the VCO has to be numerically controlled too, not a VCO - presumably just a programmable counter / divider.
@ElectronicsNotes
@ElectronicsNotes 2 года назад
@@TooSlowTube I confess that I have never designed a synthesizer using an FPGA. My experience has been designing them using more traditional techniques. Interesting project, though. I would suggest a chat with an RF digital designer who has experience with synthesisers. May be the digital elements are covered both e FPGA and the remainder by analogue circuits.
@geofreymirongamoruri911
@geofreymirongamoruri911 Год назад
Why don't we just use the stable reference input frequency directly instead of doing all that for the pll since at the end vco f is same as the reference frequency
@ElectronicsNotes
@ElectronicsNotes Год назад
Yes, one can wonder why a loop is used to replicate the input frequency. There are, however, a number of ways it can be used. It can create a steady output from a pulsed input. It can be used to detect FM because the VCO voltage is the detected output. It can also be used to create a frequency synthesizer by introducing a divider or mixer into the loop. ru-vid.com/video/%D0%B2%D0%B8%D0%B4%D0%B5%D0%BE-5K7Pvc5fxZI.html I hope this helps.
@vboty
@vboty 3 месяца назад
This doesn´t explain anithing on how PLL works
@ElectronicsNotes
@ElectronicsNotes 2 месяца назад
It is intended to explain how the synthesizers using them work. If you want a video about PLLs, head over to see this video: ru-vid.com/video/%D0%B2%D0%B8%D0%B4%D0%B5%D0%BE-A9qt0JYdvFU.html
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