Great work. One remark. In my 32y on analog IC design never seen a NDA which forbid to show my own GDS on a commercial process or by a commercial layout editor. Btw the layout editor seen in the video is OS. Some PDK's mask the real layout of special primitives. So you see a mockup which get replaced at the foundry mask-making with real GDS cells. The trick is that for a full flat GDS there are still device recognition layers which trigger the substitution. For complete hidden logic cells typical the Cadence "Abstract" layer is visible. The next layout hiding method involve an IP delivery where only the fab knowns about the layout and the user only know about the simulation model.
WHITE?!?!? geeze.. I was totally loving the guest and wow what a boss microscope setup.. but then I saw his background choice.. hmmm.. white eh?? not black? you don't sleep upside down as well do you?? cuz I'm not like judging or anything ;p Amazing and inspiring work! You make me miss the old days when I worked in complitho.
