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Developing an SPI Controller for Zedboard OLED Display 

Vipin Kizheppatt
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#OLED #SPIControl #Verilog #Xilinx #Vivado #Xilinx
SPI Controller code for managing the OLED Display on Zedboard. Only supports SPI write operations and no slave select signal is present since it is permanently grounded on the board.
Source code
github.com/vipinkmenon/SPICon...

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24 июл 2024

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Комментарии : 38   
@dheerajchumble5602
@dheerajchumble5602 3 года назад
Excellent tutorial sir. I am glad that i found it. Each part is explained in detail with support of good reasoning. Waiting for many more such videos.
@jorch778
@jorch778 4 года назад
You have very good teaching skills, nicely explained dude
@TheVipinkmenon
@TheVipinkmenon 4 года назад
Thank you..
@manojkumarponduru2684
@manojkumarponduru2684 3 года назад
simply superb sir
@DongNguyen-qq3in
@DongNguyen-qq3in 2 года назад
You have a great youtube channel, thank you for the detail and insight tutorials. I think the FSM process should use CLK, not SPI_CLK, because if the period of load_data is shorter than the SPI_CLK, then FSM will not work properly. Using CLK and falling edge of SPI_CLK to put data on.
@kayitbilgileri
@kayitbilgileri Год назад
Thank you for your great tutorials. Why you assume that the Maximum SPI clock speed is 10 MHz, while it was written as it is the Minimum speed in the datasheet of the product? Thank you.
@rakshaamunirathinam3488
@rakshaamunirathinam3488 2 года назад
Is that the case with all fpga boards. I mean we need write code for all fpga boards in order to interface oled with the board. I have iCE stick 40 and i am just inserting the oled inti pomds of fpga iCE 40 stick
@sumone10
@sumone10 Год назад
Hello sir.. what is the code for a simple inbuilt spi controller in Xilinx sdk . Please help me out.
@ranitapaul29
@ranitapaul29 9 месяцев назад
Thank you for the explanation. Can u provide us with the testbench of this ?
@SanjanaS-ot9xe
@SanjanaS-ot9xe 7 месяцев назад
sir.. could you please tell that how can we access the ddr memory in zedboard sir
@ViniciusCesarTech
@ViniciusCesarTech Год назад
Thanks!!
@Vas-vg4gd
@Vas-vg4gd 4 года назад
HI ,Vipin,Nice work really! .Could you also share as many videos as possible on the work you have done? Mostly on the constraints and larger design, Its good if you can guide on PCIE/ethernet/USb/Transceiver?
@TheVipinkmenon
@TheVipinkmenon 4 года назад
I will have on Ethernet and Pcie. But not on Zedboard. May be vc707 or vc709
@abahadoran
@abahadoran 2 года назад
Sir could create a wavediagram window explaining the state diagram ?
@nandoperu100
@nandoperu100 3 года назад
Sir . Thank you for your video !!!. Could you make a video for I2C protocol in order to know how is the interchange data with slave device like RTC or Displays.. Thanks a lot again!!
@TheVipinkmenon
@TheVipinkmenon 3 года назад
Will try
@van-dungpham1201
@van-dungpham1201 3 года назад
Can we use two SPI masters in the same design? For instance, I have two devices need to control, both of them are independent, it means they can send two different value to different devices at the same time? How can we implement this design?
@TheVipinkmenon
@TheVipinkmenon 3 года назад
Of course. You can just instatntiate two SPI controllers in a top file and during pin assignment, assign the pins where the two peripherals are connected. If you don't want to send data to the devices at the same time, one SPI controller is enough. It can have 2 slave select signals which can be controlled depending on to which peripheral you want to send data to.
@van-dungpham1201
@van-dungpham1201 3 года назад
@@TheVipinkmenon Dear professor, as far as I know, Zynq can address only 1 SPI master at a time (we can only use SPI bus at one time). However, even I've tried with Zynq Ultrascale, but I could not get the good result (there is a different timing between two of SPI). Is there another solution?
@TheVipinkmenon
@TheVipinkmenon 3 года назад
If processor/software is controlling the SPI master, yes there will be slight delay between the starting of the two controller since software runs sequentially and it can configure the second controller only after configuring the first controller. If you want the controllers to start exactly at same time (like both asserting slave select on exactly same clock cycle), you will need some hardware to manage that in between. That means you cannot use the SPI controllers in PS and will have to implement them in PL. If you have using custom SPI controller (like the one I have written), you can easily do that. There can be a common control register for both controllers and software can write to that single register to start operation and both will start at the same time. If you will use Xilinx SPI IP core, you will need your custom hardware between processor and the SPI controllers. Software writes to your IP and it then controls the SPI controllers, which can happen in parallel.
@abahadoran
@abahadoran 2 года назад
Sir how did you know that the counter should count to 4 in order to achieve spi_clock with a frequency of 10 MHz ?
@hthrun
@hthrun Год назад
The input clock runs at 100 MHz and the SPI needs a 10 MHz clock. If you create a new clock based on another's positive edge it will be half the speed because you're only switching the new clock once a cycle. So that would give us a 50 MHz clock. To get the 50 MHz down to 10 we want to switch it every fifth time. The counter starts at 0 so to switch on the fifth time we have the counter go up to 4: count 0 to 4. It's tough to explain without a visual aid. Try comparing what I typed to his waveforms in the video. Let me know if I can clarify anything...
@SciHeartJourney
@SciHeartJourney 3 года назад
There's already an interface for the SPI, why re-create it? I'm looking for a video that uses the BUILTIN SPI ports. Why is this so difficult to find?
@TheVipinkmenon
@TheVipinkmenon 3 года назад
Yes PS has an SPI and you can connect it to OLED through the EMIO interface.
@SciHeartJourney
@SciHeartJourney 3 года назад
@@TheVipinkmenon, thank you. I just found out the hard way why we want to develop our own hard-coded SPI driver like this one: the Cmod-A7 does not have an SPI port (Microblaze). But I really need that SPI port on one, so this video just became one of my very favorites? I tried using the built-in QuadSPI, but you can't just pull one SPI port out it very easily. Maybe that is possible, but this method making our own SPI driver is more fundamental. Thanks for helping to open doors!
@muratakjol1437
@muratakjol1437 4 года назад
Could you please consider to upload final verilog code for all such videos?
@TheVipinkmenon
@TheVipinkmenon 4 года назад
I have added the link in the description
@KarthikReddy-tkr
@KarthikReddy-tkr 4 года назад
Bro.. please send zedboard data sheet link that you have used in this video.
@TheVipinkmenon
@TheVipinkmenon 4 года назад
cdn-shop.adafruit.com/datasheets/UG-2832HSWEG04.pdf cdn-shop.adafruit.com/datasheets/SSD1306.pdf
@KarthikReddy-tkr
@KarthikReddy-tkr 4 года назад
@@TheVipinkmenon Thank you but I want of zedboard document also
@TheVipinkmenon
@TheVipinkmenon 4 года назад
Just search in Google dear. Zedboard hardware user guide
@KarthikReddy-tkr
@KarthikReddy-tkr 4 года назад
@@TheVipinkmenon ok bro tq How can I contact you personally?
@TheVipinkmenon
@TheVipinkmenon 4 года назад
My email is in channel description
@dheerajchumble5602
@dheerajchumble5602 3 года назад
Sir, why don't u make series of such videos on this particular board for all peripherals and protocols and upload on Udemy. Newbie like me will get lots of benefit from it. It's not available anywhere.
@TheVipinkmenon
@TheVipinkmenon 3 года назад
Thank you for the suggestion. I will check it.
@thanatosor
@thanatosor 10 дней назад
- Where can I find any guide or document about FPGA ? ** A wild Indian guy appear **
@Daniel456324
@Daniel456324 3 месяца назад
This board is way overpriced. The Terasic DE1-SoC has similar architecture and logic gates for almost half the cost of this board.
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